User Manual

Chapter 5: BIOS Setup
5-36
Enforce POR [POR]
Allows you to enforce POR restrictions for DDR4 frequency and voltage programming. If this
item is set to
[Disable]
, user will be able to run at higher frequencies, specied in the DDR
Frequency Limit eld (limited by processor support).
Conguration options: [POR] [Disable]
Memory Frequency [Auto]
Allows you to select the maximum memory frequency setting in Mhz. If Enforce POR is set to
[Disable]
, user will be able to run at higher frequencies than the memory support (limited by
processor support). Do not select Reserved.
Conguration options: [Auto] [1200] - [4800-OvrClk]
Data Scrambling for DDR4/5 [Enable]
[Disable] Disables this feature.
[Enable] Enables data scrambling for DDR4 and DDR5.
Memory Topology
Displays memory topology with DIMM population information.
Page Policy
Allows you to set memory page policy parameters.
Page Policy [Adaptive]
Conguration options: [Closed] [Adaptive]
Memory Map
Allows you to set memory mapping settings.
Volatile Memory Mode [2LM]
Selects 1LM or 2LM mode for volatile memory. For 2LM memory mode, BIOS will try
to congure 2LM, but if BIOS is unable to congure 2LM, volatile memory mode will fall
beck to 1LM.
Conguration options: [1LM] [2LM]
The following item appears only when
Volatile Memory Mode
is set to
[2LM]
.
AppDirect cache [Disabled]
Allows you to enable or disable caching for the memory region.
Conguration options: [Disabled] [Enabled]
eADR Support [Disable]
Allows you to enable or disable eADR capability in th platform, Pmem/AppDirect
caching knob takes precedence.
Conguration options: [Disable] [Enable] [Auto]
The following item appears only when
eADR Support
is set to
[Enable]
or
[Auto]
.
CPU Cache Flush Mode [Parallel]
Allows you to set CPU cache ush execution mode.
Conguration options: [Serial] [Parallel]