User Manual

ASUS TS100-E11-PI4
4-13
Race To Halt (RTH) [Enabled]
Allows you to enable or disable Race To Halt feature. RTH dynamically increases the
CPUfrequencytoquicklyenterthepackageC-Stateandreducetheoverallpower.RTHis
controlled through MSR 1FC bit 20.
Congurationoptions:[Disabled][Enabled]
Intel(R) Speed Shift Technology [Native Mode]
Allows you to enable or disable Intel(R) Speed Shift Technology support. Enabling will expose
the CPPC v2 interface to allow for hardware controlled P-states.
Congurationoptions:[Disabled][NativeMode][OutofBandMode]
Per Core P State OS control mode [Enabled]
Allows you to enable or disable Per Core P state OS control mode. Disabling will set Bit 31 =
1 command 0x06. When set the highest core request is used for all other core requests.
Congurationoptions:[Disabled][Enabled]
HwP Autonomous Per Core P State [Enabled]
[Disabled] DisableAutonomousPCPS(Bit30=1,command0x11).Autonomouswill
request the same value for all cores all the time.
[Enabled] EnablePCPS(defaultBit30=0,command0x11).
HwP Autonomous EPP Grouping [Enabled]
[Disabled] DisableEPPgrouping(defaultBit29=1,command0x11).Autonomouswill
not necessarily request same values for all cores with same EPP.
[Enabled] EnableEPPgrouping(defaultBit29=1,command0x11).Autonomouswill
request the same value for all cores with same EPP.
HwP Fast MSR Support [Enabled]
Allows you to enable or disable HwP Fast MSR Support for IA32_HWP_REQUEST MSR.
Congurationoptions:[Disabled][Enabled]
HDC Control [Enabled]
[Disabled] DisableHDC.
[Enabled] CanbeenablebyOSifOSnativesupportavailable.
Turbo Mode [Enabled]
Allows you to enable or disable processor turbo mode if EMTTM is also enabled.
Congurationoptions:[Disabled][Enabled]
C-States [Enabled]
AllowsyoutoenableordisableCPUpowermanagement,thisallowstheCPUtoenterC-state
when not it is not 100 % utilized.
Congurationoptions:[Disabled][Enabled]