System information

5-20
Chapter 5: BIOS のセ

コードの更新の有効/無効を切ます
設定オ [Enable] [Disable]

AMDセア仮想マンの有効/無効を切ます
設定オ [Enable] [Disable]

ACPI_PPC, _PSS, AND _PCTオブジの生成の有効/無効を切設定オ
[Enable] [Disable]

AMDブの有効/無効を設定オプシ [Enable] [Disable]

プセの設定を変更項目を選択<Enter> を押すブメーを
させがで
Select Screen
Select Item
+- Change Option
F1 General Help
F10 Save and Exit
ESC Exit
Chipset Conguration
Memory Controller
Internal Graphics
Memory Options &
Information
Memory Controller
Memory Conguration
Power Down Control [Auto]
Memory CLK :667 MHz
CAS Latency (Tcl) :5.0
RAS/CAS Delay (Trcd) :5 CLK
Min Active RAS (Tras) :15CLK
RAS/RAS Delay (Trrd) :3 CLK
Row Cycle (Trc) :21 CLK
Asynchronous Latency :6 ns