User's Manual

Platform Design Guidelines
Intel
®
Wireless-AC 9560 (Jefferson Peak)
External Product Specification (EPS) April 2017
48 Intel Confidential Document Number: 567240–1.0
2. For Discrete: The most commonly used interfaces will work. Some interfaces will not be
available and therefore some operation modes will not function. A list of restrictions on
modes and interfaces can be found in Table 9–1.
The pinout for the Hybrid Key E socket on the motherboard is shown in Figure 9–2. The inner columns
show the Companion RF proprietary signals at their assigned pins. The Companion RF signals, listed
with the prefix “/,” signify that they are electrically MUX’d inside the PCH/SoC and are shared. Due to
this internal SoC sharing, these signals do not require any jumpers to select between the two
functions. Note that there are six (6) such signals.
Figure 9–2 2230 Hybrid Key E socket pinout (names refer to platform socket side)
9.1.3 Special considerations for the Hybrid Key E scheme
The Hybrid Key E scheme relies on assigning multiple functions to M.2 connector pins and to PCH pins.
This causes a significant reduction of the amount of signals that needs to be routed between the SoC
and the M.2 Module at the expense of additional dependency between modes, and the loss of some
functionality. The different dependencies between multiple functions pins and M.2 card functionality is
described in the following section.