Datasheet

15
9502A–AT42–07/08
AT42QT2160
4.19 Wiring
Figure 4-8. Wiring Diagram
Suggested regulator manufacturers:
• Toko (XC6215 series)
• Seiko (S817 series)
• BCDSemi (AP2121 series)
Re Figure 4-8 check the following sections for component values:
• Section 4.3 on page 5: Cs capacitors (Cs0...Cs1)
• Section Note: on page 7: Sample resistors (Rs0...Rs1)
• Section 4.7 on page 7: Matrix resistors (Rx0...Rx7, Ry0...Ry1)
• Section 4.11 on page 11: Voltage levels
• Section 6.4 on page 22: SDA, SCL pull-up resistors (Rp)
• Section 4.2 on page 5: CHANGE
resistor (Rchg)
• Section 4.2 on page 5:
I
2
C-compatible addresses
Rp Rp
MATRIX Y SCAN IN
MATRIX X DRIVE
Rchg
VREG
Rx0
Rx3
Rx6
VDD
SCL
SDA
Rs1
Cs0
Cs1
Ry1
Rx2
Rx1
Rx7
Rx5
Vunreg
VDD
VDD
Ry0
Rx4
CHANGE
I2C
I2C ADDRESS
SELECT
QT2160
Rs0
General purpose
inputs/outputs
Notes:
1) the central pad on the underside of the chip is a
Vss pin and should be connected to ground.
Do not put any other tracks underneath the body
of the chip.
2) it is important to place all Rx, Ry, Cs and Rs
components physically near to the chip.
3) leave YnA, YnB unconnected
if not used.
follow regulator manufacturers recommended values for input
and output bypass capacitors.
tightly wire a 100nF bypass capacitor between Vdd and Vss (pins 3 and 4).