Datasheet

156
8011O–AVR–07/10
ATmega164P/324P/644P
• Bit 6 – FOC2B: Force Output Compare B
The FOC2B bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to zero when
TCCR2B is written when operating in PWM mode. When writing a logical one to the FOC2B bit,
an immediate Compare Match is forced on the Waveform Generation unit. The OC2B output is
changed according to its COM2B1:0 bits setting. Note that the FOC2B bit is implemented as a
strobe. Therefore it is the value present in the COM2B1:0 bits that determines the effect of the
forced compare.
A FOC2B strobe will not generate any interrupt, nor will it clear the timer in CTC mode using
OCR2B as TOP.
The FOC2B bit is always read as zero.
• Bits 5:4 – Res: Reserved Bits
These bits are reserved bits in the ATmega164P/324P/644P and will always read as zero.
• Bit 3 – WGM22: Waveform Generation Mode
See the description in the ”TCCR2A – Timer/Counter Control Register A” on page 152.
• Bit 2:0 – CS22:0: Clock Select
The three Clock Select bits select the clock source to be used by the Timer/Counter, see Table
14-9 on page 156.
If external pin modes are used for the Timer/Counter0, transitions on the T0 pin will clock the
counter even if the pin is configured as an output. This feature allows software control of the
counting.
14.11.3 TCNT2 – Timer/Counter Register
The Timer/Counter Register gives direct access, both for read and write operations, to the
Timer/Counter unit 8-bit counter. Writing to the TCNT2 Register blocks (removes) the Compare
Table 14-9. Clock Select Bit Description
CS22 CS21 CS20 Description
0 0 0 No clock source (Timer/Counter stopped).
001clk
T2S
/(No prescaling)
010clk
T2S
/8 (From prescaler)
011clk
T2S
/32 (From prescaler)
100clk
T2S
/64 (From prescaler)
101clk
T2S
/128 (From prescaler)
110clk
T
2
S
/256 (From prescaler)
111clk
T
2
S
/1024 (From prescaler)
Bit 76543210
(0xB2) TCNT2[7:0] TCNT2
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value00000000