Datasheet

Table Of Contents
52
XMEGA E5 [DATASHEET]
Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014
Figure 28-1. ADC Overview
The ADC may be configured for 8- or 12-bit result, reducing the propagation delay from 3.35µs for 12-bit to 2.3µs for 8-bit
result. ADC conversion results are provided left- or right adjusted with eases calculation when the result is represented
as a signed.
PORTA has one ADC. Notation of this peripheral is ADCA.
ADC
Digital Correction Logic
2
2
clk
ADC
V
INP
V
INN
Stage
1
Stage
2
½x
-
64x
S&H Σ
ADC DAC
2x
2 bits
V
IN
V
OUT
Reference
Voltage
Internal 1.00V
Internal AVCC/1.6
AREFA
AREFD
Internal AVCC/2
Internal
Signals
ADC1
A
DC14
ADC0
ADC7
ADC0
A
DC15
Threshold
(Int. Req.)
RES
CMP
<
>
Averaging
Gain & Offset
Error
Correction