Datasheet

TLV320AIC3107
www.ti.com SLOS545D –NOVEMBER 2008–REVISED DECEMBER 2014
Table 166. Page 1 / Register 49: Right Channel De-emphasis Filter N1 Coefficient MSB Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7-D0 R/W 11110011 Right Channel De-emphasis Filter N1 Coefficient MSB The 16-bit integer contained in the MSB
and LSB registers for this coefficient are interpreted as a 2’s complement integer, with possible
values ranging from –32768 to +32767.
Table 167. Page 1 / Register 50: Right Channel De-emphasis Filter N1 Coefficient LSB Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7-D0 R/W 00101101 Right Channel De-emphasis Filter N1 Coefficient LSB The 16-bit integer contained in the MSB and
LSB registers for this coefficient are interpreted as a 2’s complement integer, with possible values
ranging from –32768 to +32767.
Table 168. Page 1 / Register 51: Right Channel De-emphasis Filter D1 Coefficient MSB Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7-D0 R/W 01010011 Right Channel De-emphasis Filter D1 Coefficient MSB The 16-bit integer contained in the MSB
and LSB registers for this coefficient are interpreted as a 2’s complement integer, with possible
values ranging from –32768 to +32767.
Table 169. Page 1 / Register 52: Right Channel De-emphasis Filter D1 Coefficient LSB Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7-D0 R/W 01111110 Right Channel De-emphasis Filter D1 Coefficient LSB The 16-bit integer contained in the MSB and
LSB registers for this coefficient are interpreted as a 2’s complement integer, with possible values
ranging from –32768 to +32767.
Table 170. Page 1 / Register 53: 3-D Attenuation Coefficient MSB Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7-D0 R/W 01111111 3-D Attenuation Coefficient MSB The 16-bit integer contained in the MSB and LSB registers for
this coefficient are interpreted as a 2’s complement integer, with possible values ranging from
–32768 to +32767.
Table 171. Page 1 / Register 54: 3-D Attenuation Coefficient LSB Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7-D0 R/W 11111111 3-D Attenuation Coefficient LSB The 16-bit integer contained in the MSB and LSB registers for this
coefficient are interpreted as a 2’s complement integer, with possible values ranging from –32768
to +32767.
Table 172. Page 1 / Register 55–64: Reserved Registers
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7-D0 R 00000000 Reserved. Do not write to these registers.
Table 173. Page 1 / Register 65: Left Channel ADC High Pass Filter N0 Coefficient MSB Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7-D0 R/W 00111001 Left Channel ADC High Pass Filter N0 Coefficient MSB The 16-bit integer contained in the MSB
and LSB registers for this coefficient are interpreted as a 2’s complement integer, with possible
values ranging from -32768 to +32767.
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