User's Manual

Page 10 of 36
May 16, 2019
Data Sheet and User Manual
AES-MS-MT3620-M-G Module
Data Sheet and User Manual
Wi-Fi Subsystem
Dual-band 2.4/5GHz 802.11 a/b/g/n Wi-Fi (20 MHz channels only)
Has an N968 Andes 32bit MCU
Uses an external 26 MHz crystal oscillator on the module
Has an integrated 5GHz Balun
Uses external 2.4GHz Balun and Diplexer devices on the module
Wi-Fi Antenna
The module is fitted with an on-board dual-band
chip antenna for 2.4GHz and 5GHz operation
(Pulse Electronics antenna p/n: W3006)
An inline switched RF probe connector
is provided to facilitated RF conducted measurements
A7 Application Processor
1x 500MHz Arm Cortex A7 application processor
core, with 4MB SRAM (shared)
M4F IO Processors
2x 200MHz Arm Cortex M4F IO processor cores,
each with 64KB SRAM
The module pins-out the IO0_TXD and IO1_TXD pins from their dedicated UARTs
SWD interface based debug and programming of M4F IO MCU cores may at later date be enabled
Flash Memory
16MB 100MHz (on-die) QSPI flash memory
Pluton Security Subsystem
1x Cortex M4F MCU, dedicated RAM, ROM and GP timers, system control outputs
Real Time Clock (RTC)
Low-power RTC with timer/time of day control over system power (32KHz crystal oscillator)
Peripheral Serial Interfaces
Three ISU serial interfaces are pinned-out. Their accessible pins are limited to that needed for support of:
ISU0: UART, max rate=3Mbps (4-wire)
ISU1: SPI , max rate=40 MHz (5-wire)
ISU2: I2C , max rate=1MHz (2-wire)
Other I/O Interfaces
All pinned-out I/O pins (including ISU interfaces listed above) can be individually configured as GPIO pins.
A subset of these can be configured as:
PWM outputs
ADC inputs
EXT INT inputs
Figure 3 Module with
dual-band Chip Antenna