Data Sheet

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2
32 kHz up to 96 MHz 32-bit ARM Cortex-M33
with 16 kBytes, 4-way associative cache
and FPU Memory
A flexible and configurable BLE MAC engine
implementing the controller.
A sensor node controller running uCode.
Optimized power modes (Extended sleep,
Deep sleep and Hibernation).
Flash
32Mbit SPI Flash
Memory
512 kB Data SRAM with retention capabilities
4 kB One-Time-Programmable (OTP)
Memory.
16 kB Cache SRAM with retention
capabilities.
128 kB ROM (including boot ROM and PKI
routines for Flash image authentication).
Antenna
Embedded Antenna
IO Interfaces
Decrypt-on-the-fly QSPI FLASH interface.
Separate QSPI PSRAM interface.
Parallel/SPI LCD Controller with own DMA.
3 x UARTs up to 1 Mbps, one UART
extended to support ISO7816.
2 SPI+™ controllers
2 I2C controllers at 100 kHz, 400 kHz or 3.4
MHz.
PDM interface with HW sample rate
converter.
I2S/PCM master/slave interface up to 8
channels.
USB 1.1 Full Speed device interface.
8-channel 10-bit SAR ADC, 3.4 M
samples/sec.
8-channel 14-bit ΣΔ ADC, 1000
samples/sec.
Haptic driver interface to LRA/ERM motors.
2 matched White LED drivers
Power input
(2.4 V-4.75 V) Power Input
Package
Stamp Module 19.6 mm x 15 mm x 2.45 mm
Certifications
FCC/CE
Application
Fitness trackers
Sport watches
Smartwatches
Voice-controlled remote controls
Rechargeable keyboards
Toys.
Consumer appliances
Home automation
Industrial automation
Revision History