Specifications

Simulation Models 81
Special Signal Names 0 and 1
The signal names 0 and 1 are recognized by the simulator as special. If any
signal is named 0, it will be given a Stuck Low value. If a signal named 1 is
found, it will be given a Stuck High value. These values can be cleared or
changed using the signal probe, if desired.
 See the Signal Probe command in Chapter 12, Menu Reference, for
more information.
Simulation Models
In order for LogicWorks to completely simulate a design, every symbol on
the design must have an associated simulation model. In LogicWorks, sim-
ulation models can take one of the following forms:
 Primitive Devices: These types have “hard–wired” program code to
evaluate input and output changes. They include the gates, flip–flops,
and other devices described in Chapter 9, Primitive Devices, as well as
the user–definable PROM and PLA primitives.
 Subcircuit Devices: The simulation function of a subcircuit device is
completely determined by its internal circuit (except for the addition of
pin delays and inversion). The definition of a device subcircuit can be
stored with the part in a library. The subcircuit itself can contain any
combination of primitive devices or other subcircuits (except itself, of
course!) nested to any desired depth.
Whenever any device type is to be simulated, all information about the
device must be loaded into memory. Unless you explicitly purge internal
circuits or code models from the design, they will become permanent parts
of the design and will be saved with the file.
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