User`s manual

Devices CPU modules
MELSEC System Q, Hardware 4 – 1
4 CPU modules
4.1 Devices
The names and data ranges of devices which can be used in the CPU module are shown in the
following tables.
4.1.1 Basic model QCPU
Device name
Range (total number)
Explanation
Q00JCPU Q00CPU Q01CPU
X Input X0–7FF
(No. of I/O device
points: 2048)
X0–FF (direct
accessible: 256)
X0–7FF
(total number of I/O points: 2048)
X0–3FF
(I/O points accessible via base units:
1024)
Input of external signals to the PLC,
e. g. by key switch, rotary switch, limit
switch, binary switch
Y Output Y0–7FF
(No. of I/O device
points: 2048)
Y0–FF (direct
accessible: 256)
Y0–7FF
(total number of I/O points: 2048)
Y0–3FF
(I/O points accessible via base units:
1024)
Output of signals for control of external
devices by program like magnetic
valves, magnetic contactors, lamps,
digital displays etc.
M Special
relay
SM0–1023 (1024) Predefined devices for special applica-
tions and additional functions of the
PLC.
Internal
relay*
M0–8191 (8192) Auxiliary devices of the PLC
L Latch
relay*
L0–2047 (2048) Auxiliary devices of the PLC
Latch relays are buffered at power shut
down
S Step relay S0–2047 (2048) Application like M device, e. g. for
marking one step number in a program
for step operation of a process.
BLink
relay*
B0–3FF (1024) Bit devices in a network, which can’t be
output directly
F Annuncia-
tor*
F0–1023 (1024) Flag for marking of an error.
If the error flag is set by an error recog-
nition program during RUN operation,
the corresponding error code will be
stored in the special relay SD.
V Edge
relay*
V0–2047 (2048) This relay is set by the negativ or posi-
tiv edge of the operation result,
depending on the instruction.
T Timer* T0–511 (512)
The low- and high-speed timers are specified by the instruc-
tions.
Incremental timer
Measurement unit of the low-speed
retentive timers: 1 to 1000 ms, 1 ms
unit (100 ms by default)
Measurement unit of the high-speed
retentive timers: 0.1 to 100.0 ms,
0.1 ms unit (10.0 ms by default)
T
(ST)
Retentive
timer*
Max. 512
The retentive timers are specified by parameters
(preset to 0)
The low- and high-speed retentive timers are specified by
the instructions.
C Counter* C0–511 (512) Incremental counter for normal or inter-
rupt processing
Interrupt
Counter*
Max. 128
(0 point by default, setting by parameters)
D Data reg-
ister*
D0–11135 (11136) Register for data storage
SD Special
register
SD0–1023 (1024) Predefined register for storage of spe-
cial data
Tab. 4-1: Device list for Q00JCPU, Q00CPU and Q01CPU