User`s manual

CPU modules Devices
4 – 10
Q04UD(E)HCPU, Q06UD(E)HCPU, Q10UD(E)HCPU, Q13UD(E)HCPU, Q20UD(E)HCPU and
Q26UD(E)CPU
Device name
Range (total number)
ExplanationQ04UDH Q06UDH Q10UDH Q13UDH Q20UDH Q26UDH
Q04UDEH Q06UDEH Q10UDEH Q13UDEH Q20UDEH Q26UDEH
X Input X0–1FFF (total number of I/O points: 8192)
X0–0FFF (I/O points accessible via base units: 4096)
Input of external signals to the PLC,
e. g. by key switch, rotary switch, limit
switch, binary switch
Y Output Y0–1FFF (total number of I/O points: 8192)
Y0–0FFF (I/O points accessible via base units: 4096)
Output of signals for control of external
devices by program like magnetic
valves, magnetic contactors, lamps,
digital displays etc.
M Special
relay
SM0–2047 (2048) Predefined devices for special applica-
tions and additional functions of the
PLC.
Internal
relay*
M0–8191 (8192) Auxiliary devices of the PLC
L Latch
relay*
L0–8191 (8192) Auxiliary devices of the PLC
Latch relays are buffered at power shut
down
S Step relay S0–8191 (8192)
No. of step relays can be changed in the parameters for
CPUs beginning at serial no. 10042... .
Application like M device, e. g. for
marking one step number in a program
for step operation of a process.
B Link relay* B0–1FFF (8192) Bit devices in a network, which can’t be
output directly
F Annuncia-
tor*
F0–2047 (2048) Flag for marking of an error.
If the error flag is set by an error recog-
nition program during RUN operation,
the corresponding error code will be
stored in the special relay SD.
V Edge
relay*
V0–2047 (2048) This relay is set by the negativ or posi-
tiv edge of the operation result,
depending on the instruction.
T Timer* T0–2047 (2048)
The low- and high-speed timers are specified by the
instructions.
Incremental timer
Measurement unit of the low-speed
retentive timers: 1 to 1000 ms, 1 ms
unit (100 ms by default)
Measurement unit of the high-speed
retentive timers: 0.1 to 100.0 ms, 0.1
ms unit (10.0 ms by default)
T
(ST)
Retentive
timer*
The retentive timers are specified by parameters (preset to
0).
The low- and high-speed retentive timers are specified by
the instructions.
C Counter* C0–1023 (1024) Incremental counter for normal or inter-
rupt processing
D Data regis-
ter*
D0–12287 (12288) Register for data storage
Extended
data regis-
ter*
Specified by parameters (preset to 0).
SD Special
register
SD0–2047 (2048) Predefined register for storage of spe-
cial data
W Link regis-
ter*
W0–1FFF (8192) Register for Link data in a network
Extended
link regis-
ter*
Specified by parameters (preset to 0).
Tab. 4-5: Device list of CPU types Q04UD(E)H to Q26UD(E)H