User Guide

4-12 Parameter Index MN850
Title P# Parameter Description
Advanced Current
P71 Contactor Delay (after start command) Sets the delay time between the request to actuate K1 and the start
of firing the thyristors.
P72 Trip Sensitivity (1=fastest trip) Unused
P73 Last Trip (Most Recent Trip) P73 stores the most recent trip code for the most recent fault. Trip
code definitions are as follows:
0 Not Used
1 Phase Loss Fault. One or phases of the incoming three phase AC power is
missing. Check fuses etc.
2 Thermal Switch Fault. A thermal switch (fan cooled units only) detected an over
temperature condition. P51 (or P95) bit 5 enabled.
3 * Thyristor Signal Fault. Thyristor control signal fault.
4 * Thyristor Firing Fault. One or more thyristors not firing.
5 * Thyristor Signal Fault. Thyristor control signal fault.
6 * Thyristor Signal Fault. Thyristor control signal fault.
7 * Thyristor Sensing Signal Fault.
8 * Thyristor Sensing Signal Fault.
9 * Thyristor Sensing Signal Fault.
10 * Thyristor Short Circuit. Thyristor shorted across the poles.
11 Under Current Fault. When Top of Ramp" is reached, P28 (or P87) Low
Current Level and P29 (or P88) Low Current Time become active. If P51, Bit 4
is enabled, a fault will occur if the output current is less than P28 for longer
than the P29 time period.
12 Current Limit Fault. During start-up, P30 (or P89) Current Limit Level and P31
(or P90) Current Limit Time are active. If P51, Bit 1 is enabled, a fault will occur
if the output current exceeds P30 for longer than the P31 time period.
13 Overload Fault. During normal operation, P34 (or P93) Overload Level and P35
(or P94) Overload Delay are active. If P51, Bit 2 is enabled, a fault will occur if
the output current is equal to or greater than P34 for longer than the P35 time
period.
14 Shearpin Fault. When Top of Ramp" is reached, P32 (or P91) Shearpin Level
and P33 (or P92) Shearpin Time become active. If P51, Bit 3 is enabled, a fault
will occur if the output current is greater than P32 for longer than the P33 time
period.
15 Thermistor Fault. Motor is overtemperature.
16 External Trip.
* Contact Baldor if this fault occurs.
Parameters P74 2nd Last Trip P74 stores the trip code for the fault previous to P73. See P73 for definitions.
P75 3rd Last Trip P75 stores the trip code for the fault previous to P74. See P73 for definitions.
P76 4th Last Trip P76 stores the trip code for the fault previous to P75. See P73 for definitions.
P77 5th Last Trip (Oldest trip) P77 stores the trip code for the fault previous to P76. See P73 for definitions.
P78 Protection Mode 2
(trips or 2nd param set)
Determines the fault protection method
0= Input phase loss detection only.
64= Full protection with full volts after top of ramp.
128= Full protection during start then bypass (no protection)
192= Full protection + Optimization
P79 Start Pedestal 2
(for 2nd param set)
Sets the voltage level for the “Start of Voltage Ramp”. Must be
sufficient to allow motor to generate a breakaway torque.
P80 Start Time 2 (for 2nd param set) Sets the time allowed for motor voltage to equal line voltage.
P81 Kick Pedestal 2 (for 2nd param set) Sets the voltage level at the start of the kickstart operation.
P82 Kick Time 2 (for 2nd param set) Sets the number of cycles that the P81 voltage is applied. Note that
for 60 Hz, 40 cycles = 667ms. For 50 Hz, 40 cycles = 800ms.
P83 Dwell 2 (for 2nd param set) Sets the dwell time allowed after top of ramp is reached.
P84 Stop Pedestal 2 (for 2nd param set) Sets the drop in motor voltage for the “Stop Voltage Ramp”
operation.
P85 Stop Time 2 (for 2nd param set) Sets the ramp down time for motor stopping.