User's Manual Part 2

RVP8 User’s Manual
April 2003
TTY Nonvolatile Setups (draft)
3–27
choice. The Blackman window is useful if you are trying to see plotted spectral
components that are more than 40dB below the strongest signal present. It is
especially useful in the “Pr” plot when a long span of data are available. FIR filters
designed with the Blackman window will have greater stopband attenuation than
those designed with the Hamming window, but the wider main lobe may be
undesirable. The rectangular window is included mostly as a teaching tool, and
should never be used in an operational setting.
Settling time (to 1%) of burst frequency estimator: 5.0 sec
The burst frequency estimator uses a 4
th
order correlation model to estimate the
center frequency of the transmitted pulses. Each burst pulse will typically occupy
approximately one microsecond; yet the frequency estimate feeding the AFC loop
needs to be accurate to, perhaps, 10KHz. Obviously this accuracy can not be
achieved using just one pulse. However, several hundred of the (unbiased) individual
estimates can be averaged to produce an accurate mean. This averaging is done with
an exponential filter whose time constant is chosen here.
Limits: 0.1 to 120 seconds.
Lock IFD sampling clock to external reference: NO
This question determines the usage of the shared SMA connector that is labeled
“AFC/(CLK)” on the RVP8/IFD. It is generally not necessary to phase lock the IFD
sampling clock to the radar system clock, since very good stability is obtained from
the burst phase measurements during normal operation. However, two cases that
benefit from clock locking are 1) using the RVP8 in a klystron system where an
external trigger is provided, and 2) dual-receiver systems in which computation of
F is important.
The following two questions will appear only if you have requested that the IFD
sampling clock be locked to an external clock reference. See Section 2.2.11 for a
description of the hardware setups that must accompany this selection.
PLL ratio of (1/1) ==> Input reference at 17.9876 MHz
The VCXO phase-locked-loop (PLL) in the RVP8/IFD can work with any input
reference clock whose frequency is a rational multiple (P/Q) of half the desired
sampling frequency, i.e., center frequency of the VCXO. This question allows this
ratio to be established. In general, the best PLL performance will be attained when
the ratio is reduced to lowest terms, e.g., use a ratio of 6/5 rather than 12/10.
Limits: 1 to 128 for both numerator and denominator.
VCXO has positive frequency deviation: YES
Most VCXOs have positive frequency deviation, i.e., their output frequency increases
with increasing input control voltage. This question will generally be answered
“yes”, but is included to accommodate the other case as well. The PLL will not lock,
and will be completely unstable, if the wrong choice is made.
Enable AFC and MFC functions: YES
AFC is required in a magnetron system to maintain the fixed intermediate frequency
difference between the transmitter and the STALO. AFC is not required in a klystron
system since the transmitted pulse is inherently at the correct frequency.