Datasheet

ST72334J/N, ST72314J/N, ST72124J
86/153
SERIAL COMMUNICATIONS INTERFACE (Cont’d)
Figure 48. SCI Block Diagram
WAKE
UP
UNIT
RECEIVER
CONTROL
SR
TRANSMIT
CONTROL
TDRE
TC
RDRF
IDLE OR NF FE -
SCI
CONTROL
INTERRUPT
CR1
R8
T8
-
M
WAKE
-
--
Received Data Register (RDR)
Received Shift Register
Read
Transmit Data Register (TDR)
Transmit Shift Register
Write
RDI
TDO
(DATA REGISTER) DR
TRANSMITTER
CLOCK
RECEIVER
CLOCK
RECEIVER RATE
TRANSMITTER RATE
BRR
SCP1
f
CPU
CONTROL
CONTROL
SCP0 SCT2
SCT1SCT0SCR2 SCR1SCR0
/2 /PR
/16
CONVENTIONAL BAUD RATE GENERATOR
SBKRWURETEILIERIETCIETIE
CR2