Specifications

ST72104Gx, ST72215Gx, ST72216Gx, ST72254Gx
18/141
6.1 LOW VOLTAGE DETECTOR (LVD)
To allow the integration of power management
features in the application, the Low Voltage Detec
-
tor function (LVD) generates a static reset when
the V
DD
supply voltage is below a V
IT-
reference
value. This means that it secures the power-up as
well as the power-down keeping the ST7 in reset.
The V
IT-
reference value for a voltage drop is lower
than the V
IT+
reference value for power-on in order
to avoid a parasitic reset when the MCU starts run
-
ning and sinks current on the supply (hysteresis).
The LVD Reset circuitry generates a reset when
V
DD
is below:
–V
IT+
when V
DD
is rising
–V
IT-
when V
DD
is falling
The LVD function is illustrated in the Figure 9.
Provided the minimum V
DD
value (guaranteed for
the oscillator frequency) is above V
IT-
, the MCU
can only be in two modes:
– under full software control
– in static safe reset
In these conditions, secure operation is always en-
sured for the application without the need for ex-
ternal reset hardware.
During a Low Voltage Detector Reset, the RESET
pin is held low, thus permitting the MCU to reset
other devices.
Notes:
1. The LVD allows the device to be used without
any external RESET circuitry.
2. Three different reference levels are selectable
through the option byte according to the applica
-
tion requirement.
LVD application note
Application software can detect a reset caused by
the LVD by reading the LVDRF bit in the CRSR
register.
This bit is set by hardware when a LVD reset is
generated and cleared by software (writing zero).
Figure 9. Low Voltage Detector vs Reset
V
DD
V
IT+
RESET
V
IT-
V
hyst