Specifications

CC
1100E
SWRS
082
Page
17
of
92
Pin #
Pin N
ame
Pin type
Descript
ion
1
SCLK
Digital Input
Serial configuration interface, clock input
2
SO (GDO1)
Digital Output
Serial configuration interface, data output
Optional general output pin when
CSn
is high
3
GDO2
Digital Output
Digital output pin for general use:

Test sig
nals

FIFO status signals

Clear
c
hannel
i
ndicator

Clock output, down
-
divided from XOSC

Serial output RX data
4
DVDD
Power (Digital)
1.8
-
3.6
V digital power supply for digital I/O’s and for the digital core
voltage regulator
5
DCOUPL
Power (Digital)
1
.6
-
2.0
V digital power supply output for decoupling
NOTE:
This pin is intended for use
only by
the
CC
1100E
. It can not be used to
provide supply voltage to other devices
6
GDO0
(ATEST)
Digital I/O
Digital output pin for general use:

Test signals

FIFO sta
tus signals

Clear
c
hannel
i
ndicator

Clock output, down
-
divided from XOSC

Serial output RX data

Serial input TX data
Also used as analog test I/O for prototype/production testing
7
CSn
Digital Input
Serial configuration interface, chip select
8
XOSC_Q1
An
alog I/O
Crystal oscillator pin 1, or external clock input
9
AVDD
Power (Analog)
1.8
-
3.6
V analog power supply connection
10
XOSC_Q2
Analog I/O
Crystal oscillator pin 2
11
AVDD
Power (Analog)
1.8
-
3.6
V analog power supply connection
12
RF_P
RF I/O
Positive RF input signal to LNA in receive mode
Positive RF output signal from PA in transmit mode
13
RF_N
RF I/O
Negative RF input signal to LNA in receive mode
Negative RF output signal from PA in transmit mode
14
AVDD
Power (Analog)
1.8
-
3.6
V analo
g power supply connection
15
AVDD
Power (Analog)
1.8
-
3.6
V analog power supply connection
16
GND
Ground (Analog)
Analog ground connection
17
RBIAS
Analog I/O
External bias resistor for reference current
18
DGUARD
Power (Digital)
Power supply connect
ion for digital noise isolation
19
GND
Ground (Digital)
Ground connection for digital noise isolation
20
SI
Digital Input
Serial configuration interface, data input
Table
17
: Pin
out O
verview