Specifications

CC
1100E
SWRS
082
Page
86
of
92
0x35 (0xF5): MARCSTATE
–
Main Radio Control State Machi
ne S
tate
Bit
Field Name
Reset
R/W
Description
7:5
R0
Not used
4:0
MA
RC_STATE[4:0]
R
Main Radio Control FSM State
Value
State name
State
(
Figure
20
,
page
45
)
0 (0x00)
SLEEP
SLEEP
1 (0x01)
IDLE
IDLE
2 (0x02)
XOFF
XOFF
3 (0x03)
VCOON_MC
MANCAL
4 (0x0
4)
REGON_MC
MANCAL
5 (0x05)
MANCAL
MANCAL
6 (0x06)
VCOON
FS_WAKEUP
7 (0x07)
REGON
FS_WAKEUP
8 (0x08)
STARTCAL
CALIBRATE
9 (0x09)
BWBOOST
SETTLING
10 (0x0A)
FS_LOCK
SETTLING
11 (0x0B)
IFADCON
SETTLING
12 (0x0C)
ENDCAL
CALIBRATE
13 (0x0D)
RX
RX
14
(0x0E)
RX_END
RX
15 (0x0F)
RX_RST
RX
16 (0x10)
TXRX_SWITCH
TXRX_SETTLING
17 (0x11)
RXFIFO_OVERFLOW
RXFIFO_OVERFLOW
18 (0x12)
FSTXON
FSTXON
19 (0x13)
TX
TX
20 (0x14)
TX_END
TX
21 (0x15)
RXTX_SWITCH
RXTX_SETTLING
22 (0x16)
TXFIFO_UNDERFLOW
TXFIFO_UND
ERFLOW
Note: it is not possible to read back the SLEEP or XOFF state numbers
because setting
CSn
low will make the chip enter the IDLE mode from the
SLEEP or XOFF states.
0x36 (0xF6): WORTIME1
–
Hi
gh Byte of WOR T
ime
Bit
Field Name
Reset
R/W
Description
7:0
TIME[15:8]
R
High byte of timer value in WOR module
0x37 (0xF7): WORTIME0
–
Low
Byte of WOR T
ime
Bit
Field Name
Reset
R/W
Description
7:0
TIME[7:0]
R
Low byte of timer value in WOR module