Specifications

Bluegiga Technologies Oy
Page 22 of 64
R1
R2
LDO
(1.8V...3.6V)
EN
IN
VDD_BAT
VREG_ENA
VDD_IO
GPIO (holds the external LDO on)
ON/OFF
Button
Battery Voltage
(2.7V...4.4V)
C1
100k
100k
4u7
Figure 8: Example of making a power on/off button using the latch feature of the internal regulators
iWRAP Example: Creating an on/off button with PIO2 holding the external regulator on
“SET CONTROL VREGEN 2 4”
(PIO is defined with a bit mask. 4 in hexadecimal is 100 in binary corresponding to PIO2)
NOTE: With the configuration shown above, when doing a SW reset for the module C1 will hold the enable pin
of the external regulator high until iWRAP has booted. This will prevent the module from turning off during
reset. When resetting through the reset pin one has to make sure that the enable pin is held high as long as
the reset pin is held active.
Figure 9 shows an example how to arrange power control when on/off button is not implemented. VREG_ENA
pin must not be connected to VDD_IO because leakage from VDD_BAT to VDD_IO will prevent VREG_ENA
to fall low enough to turn off the internal regulators.