Specifications
Bluegiga Technologies Oy
Page 31 of 64
8.1.1 Resetting Through UART Break Signal
The UART interface can reset WT32i on reception of a break signal. A break is identified by a continuous logic
low (0V) on the UART_RX terminal. If t
BRK
is longer than the value, defined by
PSKEY_HOSTIO_UART_RESET_TIMEOUT, a reset occurs. This feature allows a host to initialise the system
to a known state. Also, WT32i can emit a break character that may be used to wake the host.
Default PSKEY_HOSTIO_UART_RESET_TIMEOUT setting in WT32i is zero, which means that this feature is
disabled. To use this feature, either the PS setting has to be changed for each module separately or ask for
modules with custom FW with appropriate settings.
8.1.2 UART Configuration While Reset is Active
The UART interface for WT32i is tristate while the chip is being held in reset. This allows the user to daisy
chain devices onto the physical UART bus. The constraint on this method is that any devices connected to
this bus must tristate when WT32i reset is de-asserted and the firmware begins to run.
8.1.3 UART Bypass Mode
Alternatively, for devices that do not tristate the UART bus, the UART bypass mode on WT32i can be used.
The default state of WT32i after reset is de-asserted; this is for the host UART bus to be connected to the
WT32i UART, thereby allowing communication to WT32i via the UART. All UART bypass mode connections
are implemented using CMOS technology and have signalling levels of 0V and VDD_IO.
The bypass mode is enabled with a simple iWRAP command. When in bypass mode, the module is
automatically set into deep sleep state indefinitely. Physical reset is required to return to normal operation
mode. The current consumption of a module in bypass mode is equal to a module in standby (idle) mode.
It is important for the host to ensure a clean Bluetooth disconnection of any active links before the bypass
mode is invoked. Therefore, it is not possible to have active Bluetooth links while operating the bypass mode.
WT12
Host
processor
Test
interface
RXD
CTS
RTS
TXD
Another
device
TX
RTS
CTS
RX
UART_TX
UART_RTS
UART_CTS
UART_RX
RESET
PIO5
PIO6
PIO7
PIO4
UART
WTxx
WT32i
Figure 14: UART bypass architecture
8.2 USB Interface
WT32i has a full-speed (12Mbps) USB interface for communicating with other compatible digital devices. The
USB interface on WT32i acts as an USB peripheral, responding to requests from a master host controller.