Owner's Manual

K8VGA-M BIOS Setup
User’s Manual
20
4.3.8 PCI Delay Transaction
The chipset has an embedded 32-bit posted write buffer to support
delay transactions cycles. Select Enabled to support compliance with
PCI specification.
The Choices: Disabled (Default), Enabled.
4.4 MEMORY HOLE
You can reserve this area of system memory for ISA adapter ROM. When
this area is reserved it cannot be cached. The user information of
peripherals that need to use this area of system memory usually2
discussed their memory requirements.
The Choices: Disabled (default), Enabled.
4.5 INIT DISPLAY FIRST
With systems that have multiple video cards, this option determines
whether the primary display uses a PCI Slot or an AGP Slot.
The Choices: PCI Slot (default), AGP.
4.6 SYSTEM BIOS CACHEABLE
Selecting the “Enabled” option allows caching of the system BIOS ROM at
F0000h-FFFFFh which can improve system performance. However, any
programs writing to this are a of memory will cause conflicts and res ult in
system errors.
The Choices: Enabled (default), Disabled.