Instruction manual

TO INTERRUPT YOUR BUS CONTROLLER USING SRQ
* Send a bus device clear message.
* Clear the event registers with the *CLS (clear status) command.
* Set the *ESE (standard event register) & *SRE (status byte register) enable
masks.
* Send the *OPC? (Operation complete query) command and enter the result to
assure synchronization.
* Enable your bus controllers IEEE-488 SRQ interrupt.
TO DETERMINE WHEN A COMMAND SEQUENCE IS COMPLETED.
* Send a device clear message to clear the instrument’s output buffer.
* Clear the event registers with the *CLS (clear status) command
* Enable “operation complete” using the *ESE 1 command (standard event regis-
ter)
* Send the *OPC? (Operation complete query) command and enter the result to
assure synchronization.
* Send your programming command string and place the *OPC
(Operation complete) command as the last command.
* Use a serial poll to check to see when bit 5 (standard event) is set in the status
byte summary register. You could also configure the instrument for an SRQ
interrupt by sending *SRE 32 (status byte enable register, bit 5).
HOW TO USE THE MESSAGE AVAILABLE BIT (MAV)
You can use the status byte “message available” bit (bit 4) to determine when
data becomes available to read into your bus controller. The instrument sets bits 4
when the first reading becomes ready (which can be READ?). The instrument subse-
quently clears bit 4 only after all messages have been read from the output buffer.
The message available (MAV) bit can only indicate when first reading is available
following a READ? Or following a *TST? Query command. This can be helpful be-
cause you do not know when the Self-Test will be completed after the *TST? Com-
mand is given.
THE STANDARD EVENT REGISTER
The standard event register reports the following types of instrument events:
power-on detected, command syntax errors, command execution errors, self-test or
calibrationerrors, query errors, or when an *OPC command is executed. Any or all of
these conditions can be reported in the standard event summary bit through the
enable register. You must write a decimal value using the *ESE (event status enable)
command to set the enable register mask.
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