Specifications

18
PCM Timing Diagram(Long Frame Sync, Master mode)
Reference
Characteristics
Min
Typ
Max
Unit
1
PCM bit clock frequency
-
-
12
MHz
2
PCM bit clock LOW
41
-
-
ns
3
PCM bit clock HIGH
41
-
-
ns
4
PCM_SYNC delay
0
-
25
ns
5
PCM_OUT delay
0
-
25
ns
6
PCM_IN setup
8
-
-
ns
7
PCM_IN hold
8
-
-
ns
8
Delay from rising edge of PCM_BCLK during last bit period
to PCM_OUT becoming high impedance
0
-
25
ns
PCM Interface Timing Specifications(Long Frame Sync, Master Mode)
PCM Timing Diagram(Long Frame Sync, Slave mode)