OEM/Integrators Installation Manual BCM-LA100-AS Revision 0.1 DRAFT – 2019/03/18 CONFIDENTIAL INFORMATION BnCOM Co.,Ltd.
List of Contents 1. General ...................................................................................................... 3 1.1 Overview ....................................................................................................................................... 3 1.2 Features ........................................................................................................................................ 4 1.3 Pin Configuration ......................................................
1. General 1.1 Overview This specification covers Bluetooth module which complies with Bluetooth specification version 5.0 and integrates RF & Baseband controller in small package. This Module has deployed Airoha AB1611 chipset. All detailed specification including pin outs and electrical specification may be changed without notice.
1.2 Features ■ Bluetooth® Ver5.0 specification compliant ■ 2Mbps, Long Range, ADV extention, SIG Mesh ■ Embedded 32-bit MCU with 16/72MHz clock rate ■ Embedded 4Mbit Flash ■ 64KB SRAM ■ 9 AIO support (12bit) ■ 21 GPIO support ■ Integrate 16-bits, 16KHz Mic ADC for voice search/input applications ■ Integrate 1.8V switching regulator and 1.8V LDO regulator ■ Ultar-low power consumption for battery enabled applications ■ Competitive Size: 11mm x 16mm x 2.
GND GND GND GND GND GND GND GND GND GND GND 1.
1.
1.5 Package Dimensions & Land Pattern ● unit = mm ● General Tolerances = ±0.2mm 11.00 0.60 16.00 0.40 1.80 1.40 4.80 2.35 0.30 0.30 0.15 0.20 1.15 1.
unit = mm 0.80 11.00 1.40 3.85 16.00 4.80 0.25 1.20 1.125 ● 0.250 0.
2. Characteristics 2.1 Electrical Characteristics ■ Absolute Maximum Ratings ITEM Min Max Unit Storage Temperature range -40 85 °C -0.3 3.6 V -0.3 3.6 V Battery VBAT VDD_IO ■ Recommended Operating Conditions ITEM Min TYP Max Unit Operating Temperature range -30 20 85 °C 1.9 3.6 V 1.7 3.6 V Battery VBAT VDD_IO ■ Digital Terminals ITEM Min TYP Max Unit Input logic level low (VIL) 0 - 0.3*VDDIO V Input logic level high (VIH) 0.7*VDDIO - VDDIO+0.
2.2 RF Characteristics ■ Transmitter Specification Condition Min Typ Max Unit CH0 - 9.5 - dBm CH39 - 9.5 - dBm CH78 - 9.5 - dBm ≥±3MHz - -30 - dBm +2MHz - -20 - dBm -2MHz - -20 - dBm ≤-3MHz - -30 - dBm Δf1avg 225 275 KHz Percent of Δf2max > 185KHz 99.9 100 % Δf2avg/Δf1avg - 1 - Center freq. deviation, Fn (n=0,1,2,…..k) -150 - +150 KHz Freq. drift, |F0-Fn| (n=2,3,4,……k) -50 - +50 KHz Initial freq. drift, |F1-F0| -20 - +20 KHz Max. freq.
3. Terminal Description 3.1 UART Interface BCM-LA100-AS supports two UARTs. One is dedicated pin and the other can be configured via GPIOs. The UART interface supports flexible configurations as shown below. There are local FIFOs and DMA Which provide high throughput serial communication. The UART also supports the hardware flow control. When it is enabled, two additional signal, UART_RTS and UART_CTS, are required.
[ UART timing diagram ] Symbol Description Min Max Unit t1 RTS low to start receiving 0 - us t2 Last 2 byte received to RTS high - 1 byte t3 CTS low to start transmitting 0.5 1.
3.2 SPI Interface The SPI communicates with external devices. The 3-wire and 4-wire mode SPI interface are supported. SPI_MOSI is the data I/O pin of the SPI interface when the 3-wire mode is selected. The SPI interface is shared with GPIOs and the mapping tables are listed below.
The SPI interface also supports multiple bytes in single transfer. A Hold Delay can be set between each byte, as shown in the following figure. [ SPI interface Multiple Bytes Transfer ] 3.3 I2C Interface The I2C is master interface. It supports 100, 400 and 800Khz clock rates. For controlling EEPROM, A write protect (WP) signal is also supported through GPIO. The I2C interface provides several data formats and can fit various I2C peripherals. Sequential read and write are supported to improve throughputs.
[ Definition of timing on the I2C bus ] Symbol Standard-mode Description Fast-mode Fast-mode Plus unit min max min max min max 0 100 0 400 0 800 KHz fSCL SCL clock frequency tLOW LOW period of the SCL clock 5.00 - 1.58 - 0.67 - us tHIGH HIGH period of the SCL clock 5.00 - 0.92 - 0.58 - us 6.33 - 1.33 - 0.67 - us 1.33 - 0.50 - 0.
3.4 I2S Interface The I2S is a simple serial interface for sending stero audio bit streams. BCM-LA100-AS supports three I2S modes. The timing diagrams for the three modes are shown in the following diagram.
[ Timing for I2S master mode ] Symbol Fsck thc tic ts1 th1 ts2 th2 ts3 th3 tr tf Description Clock-Frequency Clock high Clock low Set-up time Hold time Set-up time Hold time Set-up time Hold time Rise time (10% - 90%, 30pF) Fall time (90% - 10%, 30pF) min 16K 240ns 240ns 20ns 20ns 20ns 20ns 20ns 20ns 8ns 8ns 17
3.5 DMIC BCM-LA100-AS supports two DMIC and two wire mode. One is one-wire mode that left and right channel use one share data pin. Another two-wire mode that left and right channel use different data pin. Timing diagrams and interface connection are drawn below. The sample phase for each wire mode is also programmable.
4. Layout Guide 4.1 Layout Guide For optimal performance of the antenna place the module at the outside of the PCB Do not place any metal (traces, components, battery etc.) within the clearance area of the antenna. Connect all the GND pins directly to a solid GND plane. Place the GND vias as close to the GND pins as possible. Use good layout practices to avoid any excessive noise coupling to signal lines or supply voltage lines.
5. Reflow Temperature Profile Recommended solder reflow profile are shown in below and follow the lead-free profile I accordance with JEDEC Std 20C. Table lists the critical reflow temperatures. Flux residue remaining from board assembly can contribute to electrochemical migration over time. This depends on number of factors, including flux type, amount of flux residue remaining after reflow, and stress conditions during product use, such as temperature, humidity, and potential difference between pins.
6.
5 4 3 2 Power On/Off 1 I2C Interface BAT_P BAT_P 10 11 12 UART_RX 13 UART_TX 14 GPIO6 15 44 GPIO21 OD_GPIO0/SDA GPIO20 OD_GPIO1/SCL GND OD_GPIO2 REGEN GND VBAT GND GND UART_RX GPIO19 UART_TX GPIO18 GPIO6 VDD_IO GND GND 17 18 19 20 21 22 23 24 25 26 27 GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 B GPIO8 BCM-LA100-AS GPIO7 GPIO7 16 RST_N GND 40 TP11 39 1 GPIO13 GPIO10 SW3 RST_N TP13 37 36 35 GPIO14 SW TACT_SMT GPIO11 SW
FCC MODULAR APPROVAL INFORMATION EXAMPLES for Manual This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference. (2) This device must accept any interference received, including interference that may cause undesired operation. CAUTION: Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate the equipment.
Validity of using the module certification: In the event that these conditions cannot be met (for example certain laptop configurations or co‐ location with another transmitter), then the FCC authorization for this module in combination with the host equipment is no longer considered valid and the FCC ID of the module cannot be used on the final product.