User manual

VETTA Theory of Operation………………Line 6 confidential ……………………………. Page 13 of 18
I/O system:
The following Input and Output (I/O) signals control the VETTA operations
GUITAR_IN_SENSE
This input signal is generated on the Guitar Input PCB and read on the Main PCB by an I/O pin
of DSP #1. It is high when a jack is plugged in the guitar input and low otherwise.
When this signal is read low (= no jack plugged in), the DSP mutes the audio signal path in
order to keep the noise on the audio outputs at a minimum
On the Option Board (not available yet):
LINE_IN_SENSE (USED ONLY WITH OPTION BOARD PRESENT)
This input signal is generated on the option board (when present) and read on the Main PCB by
an I/O pin It is high when a jack is plugged in the Line input of the option board and low
otherwise. As with the GUITAR INPUT, muting is applied to the DSP if the LINE input is
selected and no jack is present (=Low).
Option card ID reading (USED ONLY WITH OPTION BOARD PRESENT)
If an option card is installed, the firmware can read from it an eight-bit serial ID code unique to
that type of card. If no card is installed the ID read will be 0FFh
The IDs currently assigned are:
000h = Digital OUT only card
001h = Digital IN and OUT card
… Unused
0FFh = No card
Hardware version reading
The three lines BDM_DDATA0 = bit 0, BDM_DDATA1 = bit 1, and BDM_DDATA2 = bit 2
can be read at anytime by the microprocessor U27 to determine what hardware revision of the
Main PCB hardware is being used. The code read is determined by the set up of the three
resistors R125, R130, and R131 that can be installed to be either pull down or pull up.
This allows for future version of the firmware to automatically adapt to older Main PCB
hardware version. The first board version released in the market had code 0 (= all three
resistors are wired to be pull down). If necessary, following version code will increment by 1.
Seven hardware IDs from 0 to 06h are allowed. The hardware differences of relevance to the
firmware between the Main PCB versions will be documented in ECOs. Code 07h is reserved
for test mode.
Test mode reading
When, while during the firmware initialization, the three lines BDM_DDATA0 = bit 0,
BDM_DDATA1 = bit 1, and BDM_DDATA2 = bit 2 are read all high (07h) by the
microprocessor U27, it signals that the MAIN BOARD is being tested (likely on a bed of nail
fixture), and that the test firmware should be executed instead of the regular firmware. Those
three lines can be forced high by the tester’s bed of nail by forcing the right side of R125,
R130, and R131 to 5 volts.