Datasheet

Product Dimensions
PIN 1 & BACKSIDE CHAMFER
4.00
(.157)
0.00 - 0.05
(.000 - .002)
0.80 - 0.95
(.031 - .037)
6.50
(.256)
0.85
(.033)
0.85 ± 0.05
(.033 ± .002)
0.90
(.035)
0.85
(.033)
0.30
(.012)
0.30
(.012)
1.335
(.053)
1.335
(.053)
1.275
(.050)
1.275
(.050)
0.85
(.033)
0.85
(.033)
0.85
(.033)
0.73
(.029)
1.20
(.047)
1.20
(.047)
1.35
(.053)
1.35
(.053)
0.85
(.033)
1.275
(.050)
0.725
(.029)
0.825
(.032)
0.70
(.028)
0.825
(.032)
0.40
(.016)
1.15
(.045)
1.25
(.049)
0.75
(.030)
0.75
(.030)
0.75
(.030)
1.30
(.051)
C PIN 1
0.25
(.010)
0.40
(.016)
0.70
(.028)
DIMENSIONS:
MM
(INCHES)
Recommended Pad Layout
1234
8765
Specifi cations are subject to change without notice.
Customers should verify actual device performance in their specifi c applications.
TBU-PL Series - TBU
®
High-Speed Protectors
Dark grey areas show added PCB copper area for better
thermal resistance.
Thermal Resistance vs Additional PCB Cu Area
Added Cu Area (Sq. In.)
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
120
100
80
60
40
20
0
Thermal Resistance (°C/W)
Power in One Side of TBU
®
Device
Total Power in Both Sides of TBU
®
Device
TBU
®
High-Speed Protectors have a 100 % matte-tin termination
nish. For improved thermal dissipation, the recommended layout
uses PCB copper areas which extend beyond the exposed solder
pad. The exposed solder pads should be defi ned by a solder mask
which matches the pad layout of the TBU
®
device in size and spac-
ing. It is recommended that they should be the same dimension as
the TBU
®
pads but if smaller solder pads are used, they should be
centered on the TBU
®
package terminal pads and not more than
0.10-0.12 mm (0.004-0.005 in.) smaller in overall width or length.
Solder pad areas should not be larger than the TBU
®
pad sizes
to ensure adequate clearance is maintained. The recommended
stencil thickness is 0.10-0.12 mm (0.004-0.005 in.) with a stencil
opening size 0.025 mm (0.0010 in.) less than the solder pad
size. Extended copper areas beyond the solder pad signifi cantly
improve the junction to ambient thermal resistance, resulting in
operation at lower junction temperatures with a corresponding
benefi t of reliability. All pads should soldered to the PCB, includ-
ing pads marked as NC or NU but no electrical connection should
be made to these pads. For minimum parasitic capacitance, it is
recommended that signal, ground or power signals are not routed
beneath any pad.