Installation manual

Revision F • 3/12
HARRIS CORPORATION
5-6
5 Service
operational status or an error condition. These
are driven by U1, a 16-bit shift register/ latch
with constant current LED driver outputs.
5.2.3 LINUX CPU
The Linux CPU is the small PCA latched into
a SODIMM memory card socket (J8), a 144-pin
edge connector on the Interface Controller.
The CPU is an Atmel ARM9 microprocessor
running a Linux kernel (a subset of a full Linux
install) so it takes about 30 seconds for it to boot
up from pressing
Processor Reset or from when
power is first ap-
plied to the
HDE-200.
The CPU in-
cludes on-board
SDRAM to hold
the Linux operating system and the HD Radio
codec code. It has an Ethernet interface (hence
the Linux CPU MAC address and IP address) that
goes through T1 on the Interface Controller to
connect to the Broadcom Ethernet switch.
The CPU also has a USB controller (Host 2.0
compatible). USB power is supplied by U41 on
the Interface Controller.
5.2.4 HD RADIO DSP
The Main Program Service (MPS) audio, plus
the various HD Radio data and settings assigned
using the Exporter Control Center (ECC app), pro-
gram service data (PSD) from a digital playback
system, and any incoming data received from an
HD Radio Importer, is encoded by the HD Radio
DSP board using an Ethernet connection on the
Interface Controller. Thus, the HD Radio DSP
board also has its
own separate
MAC and IP ad-
dresses. In addi-
tion, each board
is serialized, to identify the exact codec that gen-
erated the HD Radio signal. This serial number
must be properly identified during HDE-200 con-
figuration.
The HD Radio DSP board is based on a Texas
Instruments TMS320C6713 floating point DSP.
This DSP chip is used to compress and trans-
form the incoming MPS audio into the HD Ra-
dio format using proprietary code (HDC codec)
supplied by iBiquity. The ECC app selections and
the HD Radio Importer data and secondary au-
dio channels are combined with the processed
MPS audio to then create the HD Radio E2X
data stream, which is output on the Ethernet ports
to feed the HD Radio Exciter.
5.3 HDE-200 Troubleshooting
As with other software-based products, if the
HDE-200 should stop responding to the front
panel controls or to the ECC app, then it most
likely indicates the unit has to be reset. If there is
no HD Radio audio output, then it would indi-
cate the Linux CPU, which controls audio routing
through the HDE-200, or the HD Radio DSP
board have hung up and will need to be reset.
The analog broadcast audio will continue since
there are fail-over relays that couple the Main
Delay In audio to the Main Delay Out audio in
the event of a CPU failure. If there is an issue with
the Interface Controller FPGA, then the Diversity
Delay will be affected.
If any of these conditions are encountered (no
HD Radio signal but the Main Delay Out is still
working) then the first step would be to press the
Processor Reset button on the rear panel. This
reboots the Linux CPU, reloads the FPGA con-
figuration from the Flash Memory, and restarts the
HD Radio DSP.
It takes about 30 seconds for the Linux CPU to
complete rebooting (a boot message is shown on
the front panel display during this time). At the