Datasheet

15
1
3
2
4
8
6
7
5
C
LEDP
C
LEDN
1
3
2
4
8
6
7
5
C
LEDP
C
LEDN
SHIELD
C
LEDO1
C
LEDO2
T
JE
= LED junction temperature
T
JD
= detector IC junction temeperature
T
C
= case temperature measured at the center of the package bottom
LC
= LED-to-case thermal resistance
LD
= LED-to-detector thermal resistance
DC
= detector-to-case thermal resistance
CA
= case-to-ambient thermal resistance
*
CA
will depend on the board design and the placement of the part.
LD
= 442 °C/W
T
JE
T
JD
LC
= 467 °C/W
DC
= 126 °C/W
CA
= 83 °C/W*
T
C
T
A
θ
θ
θ
θ
θ
θ
θ
θ
θ
Figure 28. Thermal model.
LED Drive Circuit Considerations for Ultra High CMR Performance.
Without a detector shield, the dominant cause of opto-
coupler CMR failure is capacitive coupling from the input
side of the optocoupler, through the package, to the de-
tector IC as shown in Figure 29. The ACPL-312T improves
CMR performance by using a detector IC with an optically
transparent Faraday shield, which diverts the capacitively
coupled current away from the sensitive IC circuitry. How-
ever, this shield does not eliminate the capacitive coupling
between the LED and optocoupler pins 5-8 as shown in
Figure 30. This capacitive coupling causes perturbations
Figure 29. Optocoupler input to output capacitance model for unshielded
optocouplers.
Figure 30. Optocoupler input to output capacitance model for shielded
optocouplers.
in the LED current during common mode transients and
becomes the major source of CMR failures for a shielded
optocoupler. The main design objective of a high CMR
LED drive circuit becomes keeping the LED in the proper
state (on or o) during common mode transients. For ex-
ample, the recommended application circuit (Figure 25),
can achieve 25 kV/μs CMR while minimizing component
complexity. Techniques to keep the LED in the proper
state are discussed in the next two sections.
1
3
2
4
8
6
7
5
C
LEDP
C
LEDN
1
3
2
4
8
6
7
5
C
LEDP
C
LEDN
SHIELD
C
LEDO1
C
LEDO2
ACA
LDDCLC
DCLC
D
CADCLDEJE
TP
PT
++
++
+
+=
θ
θθθ
θθ
θθθ
*
.
))||.(
ALCLDDCD
CA
LDDCLC
DCLC
EJD
TP
PT
+++
+
++
=
))||.(
*
.
θθθ
θ
θθθ
θθ
Inserting the values for q
LC
and q
DC
shown in Figure 28
gives:
T
JE
= P
E
.(256°C/W + q
CA
) + P
D
.(57°C/W + q
CA
) + T
A
T
JD
= P
E
.(57°C/W + q
CA
) + P
D
.(111°C/W + q
CA
) + T
A
For example, given P
E
= 30 mW, P
O
= 230 mW, T
A
= 100°C
and q
CA
= 83°C/W:
T
JE
= P
E
.339°C/W + P
D
.140°C/W + T
A
= 30 mW@339°C/W + 230 mW .140°C/W + 100°C
= 142°C
T
JD
= P
E
.140°C/W + P
D
.194°C/W + T
A
= 30 mW.140°C/W + 230 mW.194°C/W + 100°C
= 149°C
T
JE
and T
JD
should be limited to 150°C based on the board
layout and part placement (q
CA
) specic to the applica-
tion.