Datasheet

20
Description of Operation
Normal Operation
During normal operation, V
OUT
of the ACPL-332J is con-
trolled by input LED current IF (pins 5, 6, 7 and 8), with
the IGBT collector-to-emitter voltage being monitored
through DDESAT. The FAULT output is high. See Figure 37.
Fault Condition
The DESAT pin monitors the IGBT V
ce
voltage. When the
voltage on the DESAT pin exceeds 6.5 V while the IGBT is
on, V
OUT
is slowly brought low in order to “softly” turn-o
the IGBT and prevent large di/dt induced voltages. Also
Figure 37. Fault Timing diagram
Figure 36. Recommended application circuit (Single Supply) with desaturation detection and active Miller Clamp
activated is an internal feedback channel which brings
the FAULT output low for the purpose of notifying the
micro-controller of the fault condition.
Fault Reset
Once fault is detected, the output will be muted for 5 µs
(minimum). All input LED signals will be ignored during
the mute period to allow the driver to completely soft
shut-down the IGBT. The fault mechanism can be reset by
the next LED turn-on after the 5us (minimum) mute time.
See Figure 37.
+
_
+
_
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
E
V
LED
DESAT
V
CC2
V
EE
V
OUT
V
CLAMP
V
EE
V
S
V
CC1
FAULT
V
S
CATHODE
ANODE
ANODE
CATHODE
+
_
R
G
100 Ω
C
BLANK
D
DESAT
Q1
Q2
+
V
CE
-
R
F
R
R
PULL-DOWN
+ HVDC
- HVDC
3-PHASE
AC
+
V
CE
-
0.1µF 0.1µF
0.1µF
C
F
7
+
_
-
I
F
V
DESAT
V
OUT
FAULT
6.5V
50%
t
DESAT(LOW)
10%
t
DESAT(10%)
90%
t
DESAT(90%)
50%
t
DESAT(FAULT)
t
DESAT(MUTE))
50%
t
RESET(FAULT)
Reset done
during the
next LED
turn-on
I
F
V
DESAT
V
OUT
FAULTFAULT
6.5V
50%
t
DESAT(LOW)
10%
t
DESAT(10%)
90%
t
DESAT(90%)
50%
t
DESAT(FAULT)
t
DESAT(MUTE))
50%
t
RESET(FAULT)
Reset done
during the
next LED
turn-on