Specifications

4.15. Extender Connector (P3): Local Bus, LCD, UART, SSP,

I2C

The EM-X270 extender connector outputs the most significant internal interfaces of the

system. This allows for custom hardware boards to be interfaced with the EM-X270.

PXA270 Local Bus

The EM-X270's Local Bus is derived from PXA270 processor’s memory interface bus.

Local Bus implements the access to various types of devices sharing the same interface

lines. Interface lines’ functioning changes dynamically per-cycle, according to the type of

addressed device.

The external memory bus interface supports:

• RAM / ROM memories

• Variable Latency I/O

• PCMCIA / Compact Flash cards

•

16-bit (only) aligned access

Use the memory interface configuration registers of the PXA270 processor to program the

device types. Refer to the PXA270 Processors Design Guide, “Processor Block Diagram”

for the block diagram of the Memory Controller configuration. Refer to the “Memory

Address Map” for the processor memory map. Refer to “Normal Mode Memory Address

Mapping” for alternate mode address mapping.

Local Bus Signals

EM-X270

Name

PXA270

Name

Voltage

Level

Type Description

LB_D[15-0] MD[15-0] 3V I/O Local bus data, lower 16 bit

P_MB_D[31-16] MD[31-16] 1.8V I/O Local bus data, upper 16 bit

LB_A[9-0] MA[9-0] 3V Output Local bus address, lower 10 bit

P_MB_A[25-10] MA[25-10] 1.8V Output Local bus address, upper 16 bit

LB_WE# nWE 3V Output Local Bus Write Control

LB_OE# nOE 3V Output Local Bus Read Control

LB_PWE# nPWE 3V Output Local Bus VLIO Write Control

LB_RDY RDY 3V Input Local Bus I/O Ready input

P_MB_RD_WR# RDnWR 1.8V Output Data direction signal

LB_CS2# nCS<2> 3V Output Chip select for static memory

range 0x08000000

0x0C000000