Manual
220 Series Commercial Grade CF Product Manual v2.0Cactus Technologies
®
Table of
CONTENTS
1. Introduction to Cactus Technologies
Commercial Grade 220 Series CF Products ......................................................... 1
1.1.Supported Standards .................................................................................................................... 2
1.2.Product Features ........................................................................................................................... 2
1.2.1.Host and Technology Independence............................................................................ 2
1.2.2.Defect and Error Management ..................................................................................... 2
1.2.3.Intelligent Power Management ..................................................................................... 3
1.2.4.Power Supply Requirements ......................................................................................... 3
2. Product Specications ....................................................................................................... 4
2.1.System Environmental Specications ......................................................................................... 4
2.2.System Power Requirements ....................................................................................................... 4
2.3.System Performance ..................................................................................................................... 5
2.4.System Reliability ........................................................................................................................... 5
2.5.Physical Specications .................................................................................................................. 5
2.5.1.CompactFlash Physical Specications .......................................................................... 5
2.6.Capacity Specications ................................................................................................................. 7
3. Interface Description .......................................................................................................... 8
3.1.CF Pin Assignments and Pin Type ................................................................................................ 8
3.2.Signal Description .......................................................................................................................... 9
3.3.Electrical Specication ................................................................................................................ 15
3.3.1.Absolute Maximum Ratings ........................................................................................15
3.3.2.DC Characteristics ......................................................................................................... 16
3.3.3.AC Characteristics ......................................................................................................... 16
3.4.Card Conguration ...................................................................................................................... 17
3.4.1.Attribute Memory Function ......................................................................................... 18
3.4.2.Conguration Option Register (Address 200h in Attribute Memory) .....................18
3.4.3.Card Conguration and Status Register (Address 202h in Attribute Memory) .....19
3.4.4.Pin Replacement Register (Address 204h in Attribute Memory) ............................20
3.4.5.Socket and Copy Register (Address 206h in Attribute Memory) .............................21
3.5.I/O Transfer Function .................................................................................................................. 22
3.6.Common Memory Transfer Function ....................................................................................... 23
3.7.True IDE Mode I/O Transfer Function ....................................................................................... 23
4. ATA Drive Register Set Denition and Protocol ........................................ 25
4.1.I/O Primary and Secondary Address Congurations ..............................................................25
4.2.Contiguous I/O Mapped Addressing ......................................................................................... 26
4.3.Memory Mapped Addressing ..................................................................................................... 27
4.4.True IDE Mode Addressing ......................................................................................................... 28
4.5.ATA Registers ............................................................................................................................... 28
4.5.1.Data Register (Address—1F0[170];Oset 0, 8, 9) ......................................................28
4.5.2.Error Register (Address—1F1[171]; Oset 1, 0Dh Read Only) ................................29
4.5.3.Feature Register (Address—1F1[171]; Oset 1, 0Dh Write Only) ...........................29