Manual

220 Series Commercial Grade CF Product Manual v2.0Cactus Technologies
®
28
True IDE Mode Addressing
4.4.
ATA Registers
4.5.
When the CompactFlash Memory Card is congured in the True IDE Mode the I/O decoding is as
listed in Table 4-23.
The Data Register is a 16-bit register, and it is used to transfer data blocks between the CF card
data buer and the Host. This register overlaps the Error Register. Table 4-24 describes the
combinations of data register access and is provided to assist in understanding the overlapped
Data Register and Error/Feature Register rather than to attempt to dene general PCMCIA
word and byte access modes and operations. See the PCMCIA PC Card Standard Release 2.0 for
denitions of the Card Accessing Modes for I/O and Memory cycles.
Table 4-23. True IDE Mode I/O Decoding
Table 4-24. Data Register
NOTE:
In accordance with the PCMCIA specication: each of the registers below which is located at an odd oset address may be
accessed at its normal address and also the corresponding even address (normal address -1) using data bus lines (D15-D8)
when -CE1 is high and -CE2 is low unless -IOIS16 is high (not asserted) and an I/O cycle is being performed.
NOTE: Because of the overlapped registers, access to the 1F1, 171 or oset 1 are not dened for word (-CE2 = 0 and
-CE1 = 0) operations. Accesses to these locations are treated as accesses to the Word Data Register. The duplicated
registers at osets 8, 9 and Dh have no restrictions on the operations that can be performed by the socket.
-CE2 -CE1 A2 A1 A0 -IORD=0
-IOWR=0
1 0 0 0 0 Even RD Data Even WR Data
1 0 0 0 1 Error Register Features
1 0 0 1 0 Sector Count Sector Count
1 0 0 1 1 Sector No. Sector No.
1 0 1 0 0 Cylinder Low Cylinder Low
1 0 1 0 1 Cylinder High Cylinder High
1 0 1 1 0 Select Card/Head Select Card/Head
1 0 1 1 1 Status Command
0 1 1 1 0 Alt Status Device Control
0 1 1 1 1 Drive Address Reserved
4.5.1. Data Register
(Address—1F0[170];Oset 0, 8, 9)
Data Register CE2- CE1- A0 Oset Data Bus
Word Data Register
0 0 X 0,8,9 D15-D0
Even Data Register
1 0 0 0,8 D7-D0
Odd Data Register
1 0 1 9 D7-D0
Odd Data Register
0 1 X 8,9 D15-D8
Error/Feature Register
1 0 1 1, Dh D7-D0
Error/Feature Register
0 1 X 1 D15-D8
Error/Feature Register
0 0 X Dh D15-D8