Instruction Manual

503 Series Industrial Grade CompactFlash Card Product Manual v2.1Cactus Technologies
®
4.5.4.Sector Count Register (Address—1F2[172]; Oset 2) ..............................................31
4.5.5.Sector Number (LBA 7-0) Register (Address—1F3[173]; Oset 3) .......................... 31
4.5.6.Cylinder Low (LBA 15-8) Register (Address—1F4[174]; Oset 4) ............................ 32
4.5.7.Cylinder High (LBA 23-16) Register (Address—1F5[175]; Oset 5) ......................... 32
4.5.8.Drive/Head (LBA 27-24) Register (Address 1F6[176]; Oset 6) ...............................32
4.5.9.Status and Alternate Status Registers
(Address 1F7[177] and 3F6[376]; Osets 7 and Eh) ...........................................................33
4.5.10.Device Control Register (Address—3F6[376]; Oset Eh) .......................................33
4.5.11.Card (Drive) Address Register (Address 3F7[377]; Oset Fh) ................................34
5. S.M.A.R.T. Functionality .................................................................................................. 36
5.1.SMART Enable Operations .......................................................................................................... 36
5.2.SMART Disable Operations ........................................................................................................ 36
5.3.SMART Enable/Disable Attribute Autosave ..............................................................................37
5.4.SMART Read Data ........................................................................................................................ 37
5.4.1.Spare Block Count Attribute ........................................................................................38
5.4.2.Spare Block Count Worse Chip Attribute ...................................................................38
5.4.3.Erase Count Attribute ................................................................................................... 39
5.4.4.Total ECC Error Attribute ............................................................................................. 39
5.4.5.Correctable ECC Error Attribute ..................................................................................40
5.4.6.UDMA CRC Error Attribute ........................................................................................... 40
5.4.7.Total Number of Reads Attribute ...............................................................................40
5.4.8.Power On Count Attribute ........................................................................................... 41
5.4.9.Total LBAs Written Attribute ........................................................................................41
5.4.10.Total LBAs Read Attribute ..........................................................................................41
5.4.11.Anchor Block Status Attribute ...................................................................................42
5.4.12.Trim Status Attribute .................................................................................................. 42
5.5.SMART Read Attribute Threshold .............................................................................................. 42
5.5.1.Spare Block Count Attribute Threshold .....................................................................43
5.5.2.Spare Block Count Worse Chip Attribute Threshold ................................................43
5.5.3.Erase Count Attribute Threshold ................................................................................ 43
5.5.4.Total ECC Error Attribute Threshold ...........................................................................43
5.5.5.Correctable ECC Error Attribute Threshold ...............................................................43
5.5.6.UDMA CRC Error Attribute Threshold ........................................................................ 44
5.5.7.Total Number of Reads Attribute Threshold .............................................................44
5.5.8.Power On Count Attribute Threshold ........................................................................44
5.5.9.Total LBAs Written Attribute Threshold ..................................................................... 44
5.5.10.Total LBAs Read Attribute Threshold ....................................................................... 44
5.5.11.Anchor Block Status Attribute Threshold ................................................................44
5.5.12.Trim Status Attribute Threshold ...............................................................................45
5.6.SMART Return Status .................................................................................................................. 45
5.7.SMART Read Log .......................................................................................................................... 45
5.8.SMART Write Log ......................................................................................................................... 46
6. -503-P1/-503-WP1 Firmware Specications .................................................47
6.1.CTLock™ ........................................................................................................................................ 47
6.1.1.Command Structure ..................................................................................................... 47
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