Hardware manual

3
FUJITSU SEMICONDUCTOR CONFIDENTIAL
MB96630 Series
DS704-00012-1v0-E
USART
Full duplex USARTs (SCI/LIN)
Wide range of baud rate settings using a dedicated reload timer
Special synchronous options for adapting to different synchronous serial protocols
LIN functionality working either as master or slave LIN device
Extended support for LIN-Protocol to reduce interrupt load
I
2
C
Up to 400kbps
Master and Slave functionality, 7-bit and 10-bit addressing
A/D converter
SAR-type
8/10-bit resolution
Signals interrupt on conversion end, single conversion mode, continuous conversion mode,
stop conversion mode, activation by software, external trigger, reload timers and PPGs
Range Comparator Function
Scan Disable Function
Source Clock Timers
Three independent clock timers (23-bit RC clock timer, 23-bit Main clock timer, 17-bit Sub clock timer)
Hardware Watchdog Timer
Hardware watchdog timer is active after reset
Window function of Watchdog Timer is used to select the lower window limit of the watchdog interval
Reload Timers
16-bit wide
Prescaler with 1/2
1
, 1/2
2
, 1/2
3
, 1/2
4
, 1/2
5
, 1/2
6
of peripheral clock frequency
Event count function
Free-Running Timers
Signals an interrupt on overflow, supports timer clear upon match with Output Compare (0, 4)
Prescaler with 1, 1/2
1
, 1/2
2
, 1/2
3
, 1/2
4
, 1/2
5
, 1/2
6
, 1/2
7
, 1/2
8
of peripheral clock frequency
Input Capture Units
16-bit wide
Signals an interrupt upon external event
Rising edge, Falling edge or Both (rising & falling) edges sensitive
Output Compare Units
16-bit wide
Signals an interrupt when a match with Free-running Timer occurs
A pair of compare registers can be used to generate an output signal
Programmable Pulse Generator
16-bit down counter, cycle and duty setting registers
Can be used as 2 × 8-bit PPG
Interrupt at trigger, counter borrow and/or duty match
PWM operation and one-shot operation
Internal prescaler allows 1, 1/4, 1/16, 1/64 of peripheral clock as counter clock or of selected Reload timer
underflow as clock input
Can be triggered by software or reload timer
Can trigger ADC conversion
Timing point capture
Start delay