Hardware manual

4
FUJITSU SEMICONDUCTOR CONFIDENTIAL
MB96630 Series
DS704-00012-1v0-E
• Quadrature Position/Revolution Counter (QPRC)
• Up/down count mode, Phase difference count mode, Count mode with direction
• 16-bit position counter
• 16-bit revolution counter
• Two 16-bit compare registers with interrupt
• Detection edge of the three external event input pins AIN, BIN and ZIN is configurable
• Real Time Clock
• Operational on main oscillation (4MHz), sub oscillation (32kHz) or RC oscillation (100kHz/2MHz)
• Capable to correct oscillation deviation of Sub clock or RC oscillator clock (clock calibration)
• Read/write accessible second/minute/hour registers
• Can signal interrupts every half second/second/minute/hour/day
• Internal clock divider and prescaler provide exact 1s clock
• External Interrupts
• Edge or Level sensitive
• Interrupt mask bit per channel
• Each available CAN channel RX has an external interrupt for wake-up
• Selected USART channels SIN have an external interrupt for wake-up
• Non Maskable Interrupt
• Disabled after reset, can be enabled by Boot-ROM depending on ROM configuration block
• Once enabled, can not be disabled other than by reset
• High or Low level sensitive
• Pin shared with external interrupt 0
• I/O Ports
• Most of the external pins can be used as general purpose I/O
• All push-pull outputs (except when used as I
2
C SDA/SCL line)
• Bit-wise programmable as input/output or peripheral signal
• Bit-wise programmable input enable
• One input level per GPIO-pin (either Automotive or CMOS hysteresis)
• Bit-wise programmable pull-up resistor
• Built-in On Chip Debugger (OCD)
• One-wire debug tool interface
• Break function:
- Hardware break: 6 points (shared with code event)
- Software break: 4096 points
• Event function
- Code event: 6 points (shared with hardware break)
- Data event: 6 points
- Event sequencer: 2 levels + reset
• Execution time measurement function
• Trace function: 42 branches
• Security function
• Flash Memory
• Dual operation flash allowing reading of one Flash bank while programming or erasing the other bank
• Command sequencer for automatic execution of programming algorithm and for supporting DMA for
programming of the Flash Memory
• Supports automatic programming, Embedded Algorithm
• Write/Erase/Erase-Suspend/Resume commands
• A flag indicating completion of the automatic algorithm
• Erase can be performed on each sector individually
• Sector protection
• Flash Security feature to protect the content of the Flash
• Low voltage detection during Flash erase or write