Hardware manual

52
FUJITSU SEMICONDUCTOR CONFIDENTIAL
MB96630 Series
DS704-00012-1v0-E
(2) Accuracy and Setting of the A/D Converter Sampling Time
If the external impedance is too high or the sampling time too short, the analog voltage charged to the
internal sample and hold capacitor is insufficient, adversely affecting the A/D conversion precision.
To satisfy the A/D conversion precision, a sufficient sampling time must be selected. The required sampling
time (Tsamp) depends on the external driving impedance R
ext, the board capacitance of the A/D converter
input pin C
ext and the AV
CC
voltage level. The following replacement model can be used for the calculation:
Sampling switch
(During sampling:ON)
C
VIN
R
VIN
Analog
input
MCU
R
ext
C
ext
Source
Comparator
R
ext
: External driving impedance
C
ext
: Capacitance of PCB at A/D converter input
C
VIN
: Analog input capacity (I/O, analog switch and ADC are contained)
R
VIN
: Analog input impedance (I/O, analog switch and ADC are contained)
The following approximation formula for the replacement model above can be used:
Tsamp = 7.62 × (Rext × Cext + (Rext + R
VIN
) × C
VIN
)
• Do not select a sampling time below the absolute minimum permitted value.
(0.5µs for 4.5V ≤ AV
CC
≤ 5.5V, 1.2µs for 2.7V ≤ AV
CC
< 4.5V)
• If the sampling time cannot be sufficient, connect a capacitor of about 0.1µF to the analog input pin.
• A big external driving impedance also adversely affects the A/D conversion precision due to the pin
input leakage current IIL (static current before the sampling switch) or the analog input leakage
current IAIN (total leakage current of pin input and comparator during sampling). The effect of the
pin input leakage current IIL cannot be compensated by an external capacitor.
• The accuracy gets worse as |AVRH - AV
SS
| becomes smaller.