User`s manual

BDM-610000082 Rev A Chapter 3: Connecting the cpuModule 45
PCIe/104 Type 2 Bus (CN1 - Top and CN2 - Bottom)
Connectors CN1 and CN2 carry the signals of the PCIe/104 PCIe bus. These signals match definitions found in
the PCI/104-Express & PCIe/104 Specification Version 2.10 from the PC/104 Embedded Consortium.
Table 27 lists the pinouts of the PC/104-Express bus connector.
WARNING Not all PCIe cards are compatible with the PCIe/104 Type 2 connector. Be sure that all of the
boards attached to this bus are compatible before powering the system.
Table 27 PCIe/104 Type 2 Bus Signal Assignments (Top View)
1
Pin Signal Signal Pin
1USB_OC#
+5 Volts
PE_RST# 2
3+3.3V +3.3V4
5 USB_1p USB_0p 6
7 USB_1n USB_0n 8
9GND GND10
11 PEx1_1Tp PEx1_0Tp 12
13 PEx1_1Tn PEx1_0Tn 14
15 GND GND 16
17 PEx1_2Tp PEx1_3Tp (CN2 only) 18
19 PEx1_2Tn PEx1_3Tn (CN2 only) 20
21 GND GND 22
23 PEx1_1Rp PEx1_0Rp 24
25 PEx1_1Rn PEx1_0Rn 26
27 GND GND 28
29 PEx1_2Rp PEx1_3Rp (CN2 only) 30
31 PEx1_2Rn PEx1_3Rn (CN2 only) 32
33 GND GND 34
35 PEx1_1Clkp PEx1_0Clkp 36
37 PEx1_1Clkn PEx1_0Clkn 38
39 +5V_STBY +5V_STBY 40
41 PEx1_2Clkp PEx1_3Clkp (CN2 only) 42
43 PEx1_2Clkn PEx1_3Clkn (CN2 only) 44
45 CPU_DIR PWRGOOD 46
47 Reserved Reserved 48
49 Reserved Reserved 50
51 Reserved PSON# 52