Specifications

LV5692P, LV5693P Application Note

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■PCB layout consideration

For maximum accuracy, VCC and RSNS pins must be Kelvin connected to R3, to avoid errors caused by

voltage drops along the traces carrying the current from the VCC to the Source pin of the FET.

■Warning

The internal circuits of USBGT and RSNS consist of components that support 5V. Do not bias 7V or

above between VCC and these pins to prevent the IC from destruction. Do not use the device under

over-voltaged condition(for example shorting these terminals to low voltage node) even for short period

of time .

In normal operating condition with recommended application, the device controls voltage of these

terminals within 5V.

■Application information using other FET

You can replace 2SJ650 with 2SJ540 or SFT1342 .(2SJ650 is to be discontinued.)

In case of using 2SJ540/SFT1342, value of all resisters and capacitors will be the same as the case of

using 2SJ650.

Since SFT1342's package is different from that of 2SJ650/2SJ540, thermal design care must be

carefully done to assure a reliable design.

You must use the FET under the condition so that the power dissipation of FET does not exceed

allowable power dissipation.