Specifications

126
3706C–MICRO–2/11
AT89LP3240/6440
Figure 18-15. Combining Several TWI Modes to Access a S erial EEPROM
19. Dual Analog Comparators
The AT89LP3240/6440 provides two analog comparators. The analog comparators have the fol-
lowing features:
• Internal 3-level Voltage Reference (1.2V, 1.3V, 1.4V)
•Four Shared Analog Input Channels
– Configure as Multiple Input Window Comparator
• Selectable Interrupt Conditions
– High- or Low-level
–Rising- or Falling-edge
–Output Toggle
•Hardware Debouncing Modes
Figure 19-1. Dual Compara
tor Block Diagram
A block diagram of the dua l analog comparators with relevant connections is shown in Figure
19-1. Input options allow the comparators to function in a number of different configurations as
shown in Figure 19-4. Comparator operation is such that the output is a logic “1” when the posi-
tive input is greater than the neg
ative input. Otherwise the output is a zero. Setting the CENA
(ACSRA.3) and CENB (ACSRB.3) bits enable Comparator A and B respectively. The user must
Master Transmitter Master Receiver
S = START Rs = REPEATED START P = STOP
Transmitted from master to slave Transmitted from slave to master
S SLA+W A ADDRESS A Rs SLA+R A DATA A P
A
B
(P2.5) AIN1
(P2.6) AIN2
(P2.4) AIN0
(P2.7) AIN3
11
10
01
00
11
10
01
00
RFB1
RFB0
RFA1
RFA0
11
10
01
00
11
10
01
00
CSB0
CSB1
CSA0
CSA1
CMPB (P4.7)
CMPA (P4.6)
CMB0
CMB1
CMB2
CMA0
CMA1
CMA2
CFB
CFA
EC
Interrupt
V
AREF
V
AREF-Δ
V
AREF+Δ