Specifications

131
3706C–MICRO–2/11
AT89LP3240/6440
Notes:1.CONB must be cleared to 0 before changing CSB[1-0].
2. Debouncing modes require the use of Timer 1 to generate the sampling delay.
Table 19-2. ACSRB – Analog Compara tor B Control & Status Register
ACSRB = 9FH Reset Value = 1100 0000B
Not Bit Addressable
CSB1 CSB0
CONB CFB CENB CMB2 CMB1 CMB0
Bit76543210
Symbol Function
CSB [1-0] Comparator B Positive Input Channel Select
(1)
CSB1 CSB0 B+ Channel
0 0 AIN0 (P2.4)
0 1 AIN1 (P2.5)
1 0 AIN2 (P2.6)
1 1 AIN3 (P2.7)
CONB Comparator B Input Connect. When CONB = 1 the analog input pins are connected to the comparator. When CONB = 0
the analog input pins are disconnected from the comparator. CONB must be cleared to 0 before changing CSB[1-0] or
RFB[1-0].
CFB Comparator B Interrupt Flag. Set when the comparator output meets the conditions specified by the CMB [2-0] bits and
CENB is set. The flag must be cleared
by software. The interrupt may be enabled/disabled by setting/clearing bit 6 of IE.
CENB Comparator B Enable. Set this bit to enable the comparator. Clearing this bit will force the comparator output low and
prevent further events from setting CFB. When CENB = 1 the analog input pins, P2.4—P2.7, have their digital inputs
disabled if they are configured in input-only mode.
CMB [2-0] Comparator B Interrupt Mode
CMB2
CMB1 CMB0 Interrupt Mode
000Negative (Low) level
001Positive edge
010Toggle with debouncing
(2)
011Positive edge with debouncing
(2)
100Negative edge
101Toggle
110Negative edge with debouncing
(2)
111Positive (High) level