Specifications

133
3706C–MICRO–2/11
AT89LP3240/6440
20. Digital-to-Analog/Analog-to-Digital Converter
The AT89LP3240/6440 includes a 10-bit Data Converter (DADC) with the following features:
• Digital-to-Analog (DAC) or Analog-to-Digital (ADC) Mode
•10-bit Resolution
• 6.5 µs Conversion Time
• 8 Multiplexed Single-ended Channels or 4 Differential Channels
• Selectable 1.0V±10% Internal Reference Voltage
•Optional Left-Adjust of Conversion Results
• Single Conversion or Timer-triggered Mode
• Interrupt on Conversion Complete
The AT89LP3240/6440 features a 10-bit su
ccessive approximation data converter that functions
in either Analog-to-Digital (ADC) or Digital-to-Analog (DAC) mode. A block diagram of the con-
verter is shown in Figure 20-1. An 8-channel Analog Multiplexer connects eight single-ended or
four differential voltage inputs from the pins of Port 0 to a sample-and-hold circuit that in turn
provides an input to the successive approximation block. The Sample-and-Hold circuit ensu
res
that the input voltage to the ADC is held a t a constant level during conversion. The SAR block
digitizes the analog voltage into a 10-b it value accessible through a data register. The SAR
block also operates in reverse to generate an analog voltage on Port 2 from a 10-bit digital
value.
ADC results a
re available in the DADL and DADH register pair. The ADC result scale is deter-
mined by the reference voltage (V
REF) generated either internally from a 1.0V reference or
externally from V
DD/2. The ADC results are always represented in signed 2’s complement form,
with single-ended voltage channels referring to the level above or below V
DD/2. The 10-bit
results may be right or left adjusted within the 16-bit register. The sign is extended through the 6
MSBs of right-adjusted results and the 6 LSBs of left-adjusted results are zeroed. If only 8-bit
precision is required, the user should select left-adjusted by setting LADJ in DADC and read only
the DADH register. Example results are listed in Tab
le 20-1.
The conversion formulas are as follows:
Conversion results can be converted into unsigned binary by adding 02h to DADH in right-
adjusted mode or 80h to DADH in left-adjusted mode. When using the external reference
(V
DD/2) in single-ended mode this is equivalent to:
To convert the unsigned binary value back to 2’s complement, subtract 02h from DADH in right-
adjusted mode or 80h from DADH in left-adjusted mode. Note that the DADH/DADL registers
cannot be directly manipulated as they are read-only in ADC mode and write-only in DAC mode.
(Singled-Ended) ADC 511
V
IN
V
DD
2⁄–
V
REF
------------------------------------
×=
(Differential) ADC 511
V
IN+
V
IN-
–
V
REF
----------------------------
×=
(Unsigned Singled-Ended) ADC 1023
V
IN
V
DD
-----------
×=