Specifications

143
3706C–MICRO–2/11
AT89LP3240/6440
22. Instruction Set Summary
The AT89LP3240/6440 is fully binary compatible with the 8051 instruction set. The difference
between the AT89LP3240/6440 and the standard 8051 is the number of cycles required to exe-
cute an instruction. Instructions in the AT89LP3240/6440 may take 1 to 9 clock cycles to
complete. The execution times of most instructions may be computed using Table 22-1.
Table 22-1. Instruction Exec
ution Times and Exceptions
Generic Instruction Types Cycle Count Formula
Most arithmetic, logical, bit and transfer instructions # bytes
Branches and Calls # bytes + 1
Single Byte Indirect (i.e. ADD A, @Ri, etc.) 2
RET, RETI 4/5
(4)
MOVC 3
MOVX 2/4
(2)
MUL 2
DIV 4
MAC 9
INC DPTR 2
Arithmetic Bytes
Clock Cycles
Hex Code8051 AT89LP
ADD A, Rn 1 12 1 28-2F
ADD A, direct 2 12 2 25
ADD A, @Ri 1 12 2 26-27
ADD A, #data 212 2 24
ADDC A, Rn 1 12 1 38-3F
ADDC A, direct 2 12 2 35
ADDC A, @Ri 1 12 2 36-37
ADDC A, #data 212 2 34
SUBB A, Rn 1 12 1 98-9F
SUBB A, direct 2 12 2 95
SUBB A, @Ri 1 12 2 96-97
SUBB A, #data 212 2 94
INC Rn 1 12 1 08-0F
INC direct 2 12 2 05
INC @Ri 1 12 2 06-07
INC A 2 12 2 04
DEC Rn 1 12 1 18-1F
DEC direct 2 12 2 15
DEC @Ri 1 12 2 16-17
DEC A 2 12 2 14
INC DPTR 1 24 2 A3