Specifications

158
3706C–MICRO–2/11
AT89LP3240/6440
Figure 25-1. In-System Programming Device Connections
The Parallel interface is a special mode of the serial interface, i.e. the serial interface is used to
enable the parallel interface. After enabling the interface serially over P1.7/SCK and P1.5/MOSI,
P1.5 is reconfigured as an active-low output enable (OE
) for data on Port 0. When OE =1, com-
mand, address and write data bytes are input on Port 0 and sampled at the rising edge of SCK.
When OE
=0, read data bytes are output on Port 0 and should be sampled on the falling edge of
SCK. The P1.7/SCK, P1.4/SS
and P4.2/RST pins continu e to function in the same manner. With
the addition of VDD and GND, the parallel interface requires a minimum of fourteen connections
as shown in Figure 25-2. Note that a connection to P1.6/MISO is not required for using the par-
allel interface.
Figure 25-2. Parallel Programming Device Connections
The Programming Interface is the only means of externally programming the AT89LP3240/6440
microcontroller. The Interface can be used to program the device both in-sys
tem and in a stand-
alone serial programmer. The Interface does not require any clock other than SCK and is not
limited by the system clock frequency. During Programming the system clock source of the tar-
get device can operate normally.
When designing a system where In-System Programming will be used, the following observa-
tions must b e considered for correct operation:
AT89LP3240/6440
VDD
P4.2/RST
P1.7/SCK
P1.5/MOSI
GND
Serial Clock
Serial In
RST
P1.4/SS
P1.6/MISO Serial Out
SS
AT89LP3240/6440
VDD P4.2/RST
P1.7/SCK
P1.5/MOSI
GND
Clock
OE
RST
P1.4/SS SS
P0.7-0 Data In/Out
8