Specifications

3706C–MICRO–2/11

AT89LP3240/6440

tain separate copies of SP for use with each stack space. Interrupts should be disabled while

swapping copies of SP in such an application to prevent illegal stack accesses.

All interrupt calls and PUSH, POP, ACALL, LCALL, RET and RETI instructions will incur a one

or two-cycle penalty while the extended stack is enabled, depending on the num

ber of stack

access in each instruction. The extended stack may only exist within the internal EDATA space;

it cannot be placed in XDATA. The stack will continue to use EDATA even if EDATA is disabled

by setting EXRAM = 1.

Figure 3-14. Stack Configurations

3.5 In-Application Programming (IAP)

The AT89LP3240/6440 supports In-Application Programming (IAP), allowing the program mem-

ory to be modified during execution. IAP can be used to modify the user application on the fly or

to use program memory for nonvolatile data storage. The same page structure write protocol for

FDATA also applies to IAP (See Section 3.3.3.1 “Write Protocol” on page 14). The CPU is

always placed in idle while modifying the program memory. When the write completes, the CPU

will continue executing with the instruction after the MOVX @DPTR,A instr

uction that started the

write.

To enable access to the program memory, the IAP bit (MEMCON.7) must be set to one and the

IAP User Fuse must be enabled. The IAP User Fuse can disable all IAP opera tions. When this

fuse is disabled, the IAP bit will be forced to 0. While IAP is enabled, all MOVX @DPTR instruc-

tions will access the CODE space instead of EDATA/FDATA/XDATA. IAP also allows

reprogramming of the Us

er Signature Array when SIGEN = 1. The IAP access settings are sum-

marized in Table 3-5.

00h

FFh

IDATA

(256)

00h

FFFh

EDATA

(4K)

SPX

XSTK = 0 XSTK = 1

Table 3-5. IAP Access Settings

IAP SIGEN DMEN MOVX @DPTR MOVC @DPTR

0 0 0 EDATA (0000–0FFFH) CODE (0000–FFFFH)

0 0 1 FDATA (1000–2FFFH) CODE (0000–FFFFH)

0 1 0 EDATA (0000–0FFFH) SIG (0000–01FFH)

0 1 1 FDATA (1000–2FFFH) SIG (0000–01FFH)

1 0 X CODE (0000–FFFFH) CODE (0000–FFFFH)

11X SIG (0000–01FFH) SIG (0000–01FFH)