Specifications

59
3706C–MICRO–2/11
AT89LP3240/6440
11.5.4 Mode 3 – Split 8-bit PWM
Timer 1 in PWM Mode 3 simply holds its count. The effect is the same as setting TR1 = 0.
Timer 0 in PWM Mode 3 establishes TL0 and TH0 as two separate PWM counters in a manner
similar to normal Mode 3. PWM Mode 3 on Timer 0 is shown in Figure 11-10. Only the Timer
Prescaler is available to change the output frequency during PWM Mode 3. TL0 can use the
Timer 0 control bits: GATE, TR0, INT0
, PWM0EN and TF0. TH0 is locked into a timer function
and uses TR1, PWM1EN and TF1. RL0 provides the duty cycle for TL0 and RH0 provides the
duty cycle for TH0.
PWM Mode 3 is for applications requiring a single PWM channel and two timers, or two PWM
channels and an extra timer or counter. With Timer 0 in PWM Mode 3, the AT89LP3240/6440
can appear to have four Timer/Counters . When Timer 0 is in PWM Mode 3, Timer 1 can be
turned on and off by switching it out of and into its own Mode 3. In this
case, Timer 1 can still be
used by the seria l port as a baud rate generator or in any application not requiring an interrupt.
The following formulas give the output frequency and duty cycle for Timer 0 in PWM Mode 3.
Figure 11-10. Timer/Counter 0 PWM Mode 3
Mode 3: f
out
Oscillator Frequency
256
-------------------------------------------------------
1
TPS 1+
---------------------
×=
Mode 3, T0: Duty Cycle % 100
RL0
256
-----------
×=
Mode 3, T1: Duty Cycle % 100
RH0
256
------------
×=
OSC
TR0
GATE0
INT0 Pin
Control
TL0
(8 Bits)
OCR0
RL0
(8 Bits)
=
T0
OSC
TH0
(8 Bits)
OCR1
RH0
(8 Bits)
=
T1
TR1
÷TPS
÷TPS