Specifications

64
3706C–MICRO–2/11
AT89LP3240/6440
RCAP2L and then overflows. The overflow sets TF2 and causes the timer registers to be
reloaded with MIN. If EXEN2 = 1, a 1-to-0 transition on T2EX will clear the timer and set EXF2.
The Timer 2 overflow rate for this mode is given in the following equation:
Timer 2 Count Mode 1 is provided to support variable precision asymmetrical PWM in the CCA.
The value of TOP stored in RCAP2H and RCAP2L is double-buffered such that a new TOP
value takes affect only a fter an overflow. The beha
vior of Count Mode 0 versus Count Mode 1 is
shown in Figure 12-3.
Figure 12-2. Timer 2 Diagram: Auto-Reload Mode (DCEN = 0)
Figure 12-3. Timer 2 Waveform: Auto-Reload Mode (DCEN = 0)
12.3.2 Up or Down Counter
Setting DCEN = 1 enables Timer 2 to count up or down, as shown in Figure 12-4. In this mode,
the T2EX pin controls the direction of the count (if EXEN2 = 1). A logic 1 at T2EX makes Timer 2
count up. When T2CM
1-0
= 00B, the timer will overflow at MAX and set the TF2 bit. This overflow
also causes BOTTOM, the 16-bit value in RCAP2H and RCAP2L, to be reloaded into the timer
Auto-Reload Mode:
DCEN = 0, T2CM = 01B
Time-out Period
RCAP2H RCAP2L{,}1+
Oscillator Frequency
------------------------------------------------------------------
TPS 1+()×=
÷TPS
TL2
TH2
MAX
MIN
BOTTOM
T2CM
1-0
= 00B, DCEN = 0
MAX
MIN
TOP
T2CM
1-0
= 01B, DCEN = 0
TF2 Set
TF2 Set