User Manual

Intel Desktop Board D915GAV/D915GAG Technical Product Specification

Table 18. PCI Interrupt Routing Map

ICH6 PIRQ Signal Name

PCI Interrupt Source

PIRQA PIRQB PIRQC PIRQD PIRQE PIRQF PIRQG PIRQH

ICH6 LAN INTA

PCI bus connector 1 INTD INTA INTB INTC

PCI bus connector 2 INTC INTB INTA INTD

PCI bus connector 3

(Note)

INTD INTC INTA INTB

PCI bus connector 4

(Note)

INTB INTA INTC INTD

Note: Not present on the D915GAG board.

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NOTE

In PIC mode, the ICH6 can connect each PIRQ line internally to one of the IRQ signals (3, 4, 5, 6,

7, 9, 10, 11, 12, 14, and 15). Typically, a device that does not share a PIRQ line will have a unique

interrupt. However, in certain interrupt-constrained situations, it is possible for two or more of the

PIRQ lines to be connected to the same IRQ signal. Refer to Table 17 for the allocation of PIRQ

lines to IRQ signals in APIC mode.

PCI interrupt assignments to the USB ports, Serial ATA ports, and PCI Express ports are dynamic.