Specifications
Table Of Contents
- Contents
- Tables
- Figures
- 1 Introduction
- 2 Interface Characteristics
- 2.1 Application Interface
- 2.1.1 Pad Assignment
- 2.1.2 Signal Properties
- 2.1.3 USB Interface
- 2.1.4 Serial Interface ASC0
- 2.1.5 Serial Interface ASC1
- 2.1.6 Inter-Integrated Circuit Interface
- 2.1.7 UICC/SIM/USIM Interface
- 2.1.8 Enhanced ESD Protection for SIM Interfaces
- 2.1.9 Digital Audio Interface
- 2.1.10 Analog-to-Digital Converter (ADC)
- 2.1.11 RTC Backup
- 2.1.12 GPIO Interface
- 2.1.13 Control Signals
- 2.1.14 JTAG Interface
- 2.1.15 eMMC Interface
- 2.2 GSM/UMTS/LTE Antenna Interface
- 2.3 GNSS Antenna Interface
- 2.4 Sample Application
- 2.1 Application Interface
- 3 GNSS Interface
- 4 Operating Characteristics
- 5 Mechanical Dimensions and Mounting
- 6 Regulatory and Type Approval Information
- 7 Document Information
- 8 Appendix
Cinterion
®
ALAS5V Hardware Interface Description
2.4 Sample Application
67
ALAS5V_HID_v00.030a 2019-03-20
Confidential / Preliminary
Page 63 of 124
Figure 27: Antenna detection circuit sample - Schematic
BATT+
ADC 2_INADC1_IN
Negative voltage limitation
Overvoltage limitation
Level adaption
to ADC inputs
BATT+
GPIOx
Switching on /off
of BATT+
ESD protection
Coupling resistor
R1
R2
V1 V2
V3 V4
R3 R4
R5 R6
R7 R8
C5
C6
R9
R10
R11
R12
R13 R14
V5
V6
V7
ANT2
L1
L2
C1 C2
C3 C4
ANT1
Low pass filter
(DC insertion)
Overvoltage limitation
For component values see
parts list