Specifications

Cinterion
®
ALAS5V Hardware Interface Description
4.4 Power Supply
96

ALAS5V_HID_v00.030a 2019-03-20
Confidential / Preliminary
Page 86 of 124
4.4 Power Supply
ALAS5V needs to be connected to a power supply at the SMT application interface - 4 lines
BATT+, and GND. There are two separate voltage domains for BATT+:
• BATT+_RF with 2 lines for the RF power amplifier supply
• BATT+ with 2 lines for the general power management.
The main power supply from an external application has to be a single voltage source and has
to be expanded to two sub paths (star structure). Each voltage domain must be decoupled by
application with low ESR capacitors (
> 47µF MLCC @ BATT+; > 4x47µF MLCC @ BATT+_RF)
as close as possible to LGA pads. Figure 37 shows a sample circuit for decoupling capacitors
for BATT+.
Figure 37: Decoupling capacitor(s) for BATT+
The power supply of ALAS5V must be able to provide the peak current during the uplink trans-
mission.
All key functions for supplying power to the device are handled by the power management IC.
It provides the following features:
• Stabilizes the supply voltages for the baseband using switching regulators and low drop lin-
ear voltage regulators.
• Switches the module's power voltages for the power-up and -down procedures.
• Delivers, across the VEXT line, a regulated voltage for an external application.
• LDO to provide SIM power supply.
BATT+
2
2
Decoupling capacitors
e.g. 47µF X5R MLCC
4x
GND
BATT+
BATT+_RF
Module
SMT interface
1x